In this work an original CMOS implementation of a discrete-time deterministic-chaos algorithm for random number generation is presented. The proposed circuit topology prevents the degradation of the generated-sequence statistical properties that can be caused by several factors, including the parameter spreading of the technological processes. Experimental results show that the circuit can issue delta-correlated 1-bit digital sequences with a generation maximum frequency above 12 MH
A new random number generator design from a double-scroll chaos is presented. The structure is based...
We present the design and the validation by means of state-of-the-art randomness tests of a high-qua...
In this work, an integrated random number generator based on oscillator sampling method is presented...
In this work an original CMOS implementation of a discrete-time deterministic-chaos algorithm for ra...
In this work a discrete-time CMOS analog/digital white-noise generator is presented. The proposed ci...
We present the design and the validation by means of suitably improved randomness tests of two diffe...
We present the design and the validation by means of suitably improved randomness tests of two diff...
This work proposes a random numbers generator for application in the field of secure communications....
As faster Random Number Generators become available, the possibility to improve the accuracy of rand...
In this work a new random number generator circuit using continuous-time chaos is described. The cir...
An analog-digital system is presented for the generation of truly random (aperiodic) digital sequenc...
A novel kind of chaos, digital chaos is proposed, and an extremely simple circuit to generate freque...
A new random number generator design from a double-scroll chaos is presented. The structure is based...
We present the design and the validation by means of state-of-the-art randomness tests of a high-qua...
In this work, an integrated random number generator based on oscillator sampling method is presented...
In this work an original CMOS implementation of a discrete-time deterministic-chaos algorithm for ra...
In this work a discrete-time CMOS analog/digital white-noise generator is presented. The proposed ci...
We present the design and the validation by means of suitably improved randomness tests of two diffe...
We present the design and the validation by means of suitably improved randomness tests of two diff...
This work proposes a random numbers generator for application in the field of secure communications....
As faster Random Number Generators become available, the possibility to improve the accuracy of rand...
In this work a new random number generator circuit using continuous-time chaos is described. The cir...
An analog-digital system is presented for the generation of truly random (aperiodic) digital sequenc...
A novel kind of chaos, digital chaos is proposed, and an extremely simple circuit to generate freque...
A new random number generator design from a double-scroll chaos is presented. The structure is based...
We present the design and the validation by means of state-of-the-art randomness tests of a high-qua...
In this work, an integrated random number generator based on oscillator sampling method is presented...