Stringent power and performance constraints, coupled with detailed knowledge of the target applications of a processor, allows for application-specific processor optimizations. It has been shown that application-specific reconfigurable hash functions eliminate a large number of cache conflict misses. These hash functions minimize conflicts by modifying the mapping of cache blocks to cache sets. This paper describes an algorithm to compute optimal XOR-functions, a particular type of hash functions based on XORs. Using this algorithm, we set an upper bound on the conflict reduction achievable with XOR-functions. We show that XOR-functions perform better than other reconfigurable hash functions studied in the literature such as bit-selecting f...
This paper describes £rst-order theorem proving with XOR constraints. The purpose of these constrain...
High performance architectures depend heavily on efficient multi-level memory hierarchies to minimiz...
We consider the family of 2n-to-n-bit compression functions that are solely based on at most three p...
XOR-mapping schemes were initially proposed in the context of interleaved memories to provide a pseu...
Scratchpad memories in GPU architectures are employed as software-controlled caches to increase the ...
AbstractA hash function H is a computationally efficient function that maps bitstrings of arbitrary ...
Parallel memory modules are widely used to increase memory bandwidth in parallel image processing an...
A concept of complexity of hashing is introduced and studied with special attention to the lower bou...
The predictability of memory access patterns in embedded systems can be successfully exploited to de...
Present a perfect hashing algorithm that uses the idea of partitioning the input key set into small ...
Modern CPUs use a variety of undocumented microarchitectural hash functions to efficiently distribut...
Consider an arbitrary program $P$ which is to be executed on a computer with two alternative cache m...
During the last two decades, the performance of CPU has been developed much faster than that of memo...
Hashing is so commonly used in computing that one might expect hash functions to be well understood,...
A number of recent papers have considered the influence of modern computer memory hierarchies on the...
This paper describes £rst-order theorem proving with XOR constraints. The purpose of these constrain...
High performance architectures depend heavily on efficient multi-level memory hierarchies to minimiz...
We consider the family of 2n-to-n-bit compression functions that are solely based on at most three p...
XOR-mapping schemes were initially proposed in the context of interleaved memories to provide a pseu...
Scratchpad memories in GPU architectures are employed as software-controlled caches to increase the ...
AbstractA hash function H is a computationally efficient function that maps bitstrings of arbitrary ...
Parallel memory modules are widely used to increase memory bandwidth in parallel image processing an...
A concept of complexity of hashing is introduced and studied with special attention to the lower bou...
The predictability of memory access patterns in embedded systems can be successfully exploited to de...
Present a perfect hashing algorithm that uses the idea of partitioning the input key set into small ...
Modern CPUs use a variety of undocumented microarchitectural hash functions to efficiently distribut...
Consider an arbitrary program $P$ which is to be executed on a computer with two alternative cache m...
During the last two decades, the performance of CPU has been developed much faster than that of memo...
Hashing is so commonly used in computing that one might expect hash functions to be well understood,...
A number of recent papers have considered the influence of modern computer memory hierarchies on the...
This paper describes £rst-order theorem proving with XOR constraints. The purpose of these constrain...
High performance architectures depend heavily on efficient multi-level memory hierarchies to minimiz...
We consider the family of 2n-to-n-bit compression functions that are solely based on at most three p...