Current High-Level Synthesis (HLS) tools perform excellently for the synthesis of computation kernels, but they often don't optimize memory bandwidth. As memory access is a bottleneck in many algorithms, the performance of the generated circuit will benefit substantially from memory access optimization. In this paper we extend an automated method for detecting and exploiting reuse of array data in loop nests to cases where the loop bounds define a non rectangular iteration domain. In such case, the length of the generated reuse buffers has to change during loop execution according to the varying reuse distance. We make use of the polyhedral representation of the source program, which makes our method computationally easy. Our software compl...
International audienceIn this paper we shortly survey some loop transformation techniques which brea...
International audienceLoop tiling is a loop transformation widely used to improve spatial and tempor...
Over the past 20 years, increases in processor speed have dramatically outstripped performance incre...
Current High-Level Synthesis (HLS) tools perform excellently for the synthesis of computation kernel...
Current high-level synthesis (HLS) tools for the automatic design of computing hardware perform exce...
High-level synthesis (HLS) is well capable of generating control and computation circuits for FPGA a...
Loop-nests in most scientific applications perform repetitive operations on array(s) and account for...
High-level synthesis (HLS) improves hardware design productivity by using high-level programming lan...
Loop pipelining is widely adopted as a key optimization method in high-level synthesis (HLS). Howeve...
International audienceHigh-level synthesis (HLS) allows hardware to be directly produced from behavi...
High-level synthesis (HLS) of loops allows efficient handling of intensive computations of an applic...
International audienceOur aim is to minimize the electrical energy used during the execution of sign...
Loop pipelining is one of the most important optimization methods in high-level synthesis (HLS) for ...
High Level Synthesis tools have reduced accelerator design time. However, a complex scaling problem ...
International audienceThere may be a huge gap between the statements outlined by programmers in a pr...
International audienceIn this paper we shortly survey some loop transformation techniques which brea...
International audienceLoop tiling is a loop transformation widely used to improve spatial and tempor...
Over the past 20 years, increases in processor speed have dramatically outstripped performance incre...
Current High-Level Synthesis (HLS) tools perform excellently for the synthesis of computation kernel...
Current high-level synthesis (HLS) tools for the automatic design of computing hardware perform exce...
High-level synthesis (HLS) is well capable of generating control and computation circuits for FPGA a...
Loop-nests in most scientific applications perform repetitive operations on array(s) and account for...
High-level synthesis (HLS) improves hardware design productivity by using high-level programming lan...
Loop pipelining is widely adopted as a key optimization method in high-level synthesis (HLS). Howeve...
International audienceHigh-level synthesis (HLS) allows hardware to be directly produced from behavi...
High-level synthesis (HLS) of loops allows efficient handling of intensive computations of an applic...
International audienceOur aim is to minimize the electrical energy used during the execution of sign...
Loop pipelining is one of the most important optimization methods in high-level synthesis (HLS) for ...
High Level Synthesis tools have reduced accelerator design time. However, a complex scaling problem ...
International audienceThere may be a huge gap between the statements outlined by programmers in a pr...
International audienceIn this paper we shortly survey some loop transformation techniques which brea...
International audienceLoop tiling is a loop transformation widely used to improve spatial and tempor...
Over the past 20 years, increases in processor speed have dramatically outstripped performance incre...