Maintaining coherency in a distributed system can prove challenging, this is especially true for distributed shared memory systems. The problem with remote synchronization in the distributed shared memory software ArgoDSM occurs when a lock operation has to cross the boundaries of a node, this causes a large number of self-invalidations (SI) or self-downgrades (SD) which is costly. The performance of the coherency protocol can be improved if the SI/SD situations can be avoided by using a suitable alternative. This work explores if the use of selective coherence operations and non-synchronizing locking can help alleviate the issue of SI and SD in ArgoDSM in order to improve performance compared to the cache-wide coherence operations that are...
We present a new coherence protocol class for DSM systems whose instances offer highly available acc...
Submitted to the University of London for the Degree of Doctor of Philosophy in Computer Scienc
Both hardware-controlled and compiler-directed mechanisms have been proposed for maintaining cache c...
for Governmental purposes notwithstanding any copyright notation thereon. The views and conclusions ...
Cache coherence is one of the main challenges to tackle when designing a shared-memory multiprocesso...
During the past few years, two main approaches have been taken to improve the performance of softwar...
Recent distributed shared memory (DSM) systems and proposed shared-memory machines have implemented ...
Distributed Shared Memory (DSM) is becoming an accepted abstraction for programming distributed sy...
During the past few years, two main approaches have been taken to improve the performance of softwar...
In this paper, we describe new protocols augmenting traditional cache coherency mechanisms to implem...
An adaptive cache coherence mechanism exploits semantic information about the expected or observed a...
Many future shared-memory multiprocessor servers will both target commercial workloads and use highl...
During the last few years many different memory consistency protocols have been proposed. These rang...
Emerging multiprocessor architectures such as chip multiprocessors, embedded architectures, and mas...
International audienceWe present a new model for distributed shared memory systems, based on remote ...
We present a new coherence protocol class for DSM systems whose instances offer highly available acc...
Submitted to the University of London for the Degree of Doctor of Philosophy in Computer Scienc
Both hardware-controlled and compiler-directed mechanisms have been proposed for maintaining cache c...
for Governmental purposes notwithstanding any copyright notation thereon. The views and conclusions ...
Cache coherence is one of the main challenges to tackle when designing a shared-memory multiprocesso...
During the past few years, two main approaches have been taken to improve the performance of softwar...
Recent distributed shared memory (DSM) systems and proposed shared-memory machines have implemented ...
Distributed Shared Memory (DSM) is becoming an accepted abstraction for programming distributed sy...
During the past few years, two main approaches have been taken to improve the performance of softwar...
In this paper, we describe new protocols augmenting traditional cache coherency mechanisms to implem...
An adaptive cache coherence mechanism exploits semantic information about the expected or observed a...
Many future shared-memory multiprocessor servers will both target commercial workloads and use highl...
During the last few years many different memory consistency protocols have been proposed. These rang...
Emerging multiprocessor architectures such as chip multiprocessors, embedded architectures, and mas...
International audienceWe present a new model for distributed shared memory systems, based on remote ...
We present a new coherence protocol class for DSM systems whose instances offer highly available acc...
Submitted to the University of London for the Degree of Doctor of Philosophy in Computer Scienc
Both hardware-controlled and compiler-directed mechanisms have been proposed for maintaining cache c...