Image convolution on FPGAs: the Implementation of a Multi-FPGA FIFO Structure

In this paper, we present an implementation of areal-time convolver, based on Field Programmable GateArrays (FPGA\u2019s) to perform the convolution operations.Main characteristics of the proposed approach are theusage of external memory to implement a FIFO bufferwhere incoming pixels are stored and the partitioning ofthe convolution matrix among several FPGA\u2019s, in order toallow data-parallel computation and to increase the size ofthe convolution kernel