Parameterized Convolution Filtering in a Field Programmable Gate Array Interval

This paper discusses the simple idea of parameterized program generation of convolution filters in an FPGA. Applications in image processing include real-time video and desktop publishing. An example 2-D filter pipeline is assembled from a set of multipliers and adders, which are in turn generated from a canonical serial-parallel multiplier stage. The need for more powerful FPGA development tools is discussed using an analogy to software development