We address the design of algorithms for multicores that are oblivious to machine parameters. We propose HM, a multicore model consisting of a parallel shared-memory machine with hierarchical multi-level caching, and we introduce a multicore-oblivious (MO) approach to algorithms and schedulers for HM. An MO algorithm is specified with no mention of any machine parameters, such as the number of cores, number of cache levels, cache sizes and block lengths. However, it is equipped with a small set of instructions that can be used to provide hints to the run-time scheduler on how to schedule parallel tasks. We present efficient MO algorithms for several fundamental problems including matrix transposition, FFT, sorting, the Gaussian Elimination P...
The Hierarchical PRAM (H-PRAM) is a model of parallel computation which retains the ideal properties...
Memory efficiency and locality have substantial impact on the performance of programs, particularly ...
Abstract. Oblivious RAM (ORAM) is a cryptographic primitive that allows a trusted CPU to securely ac...
We address the design of algorithms for multicores that are oblivious to machine parameters. We prop...
Rezaul Alam Chowdhury of Boston University presented a lecture on March 28, 2011 from 10:00 am to 11...
In this paper we explore a simple and general approach for developing parallel algorithms that lead ...
In this paper we present randomized algorithms for sorting and convex hull that achieves optimal per...
The design of algorithms that can run unchanged yet efficiently on a variety of machines characteriz...
The hierarchical organization of the memory and communication systems and the availability of numero...
In this work, we study the cache-oblivious computation model, which is inspired by the behaviour of ...
As secure processors such as Intel SGX (with hyperthreading) become widely adopted, there is a growi...
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer S...
We develop an optimal cache-oblivious priority queue data structure, supporting insertion, deletion,...
We compare two algorithms for sorting out-of-core data on a distributed-memory cluster. One algorith...
Abstract This paper presents asymptotically optimal algo-rithms for rectangular matrix transpose, FF...
The Hierarchical PRAM (H-PRAM) is a model of parallel computation which retains the ideal properties...
Memory efficiency and locality have substantial impact on the performance of programs, particularly ...
Abstract. Oblivious RAM (ORAM) is a cryptographic primitive that allows a trusted CPU to securely ac...
We address the design of algorithms for multicores that are oblivious to machine parameters. We prop...
Rezaul Alam Chowdhury of Boston University presented a lecture on March 28, 2011 from 10:00 am to 11...
In this paper we explore a simple and general approach for developing parallel algorithms that lead ...
In this paper we present randomized algorithms for sorting and convex hull that achieves optimal per...
The design of algorithms that can run unchanged yet efficiently on a variety of machines characteriz...
The hierarchical organization of the memory and communication systems and the availability of numero...
In this work, we study the cache-oblivious computation model, which is inspired by the behaviour of ...
As secure processors such as Intel SGX (with hyperthreading) become widely adopted, there is a growi...
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer S...
We develop an optimal cache-oblivious priority queue data structure, supporting insertion, deletion,...
We compare two algorithms for sorting out-of-core data on a distributed-memory cluster. One algorith...
Abstract This paper presents asymptotically optimal algo-rithms for rectangular matrix transpose, FF...
The Hierarchical PRAM (H-PRAM) is a model of parallel computation which retains the ideal properties...
Memory efficiency and locality have substantial impact on the performance of programs, particularly ...
Abstract. Oblivious RAM (ORAM) is a cryptographic primitive that allows a trusted CPU to securely ac...