The Hierarchical PRAM (H-PRAM) is a model of parallel computation which retains the ideal properties of the PRAM by using it as a sub-model, while simultaneously being more reflective of realistic parallel architectures by accounting for and providing abstract control over communication and synchronization costs. The H-PRAM represents general degrees of locality ( neighborhoods of activity), considering communication and synchronization simultaneously. We have considered H-PRAM algorithms for oblivious (data-independent) problems with inherent natural locality elsewhere. In this paper we consider two problems with no apparent natural locality (at first glance): sorting, which is an oblivious problem, and list ranking, which is non-obliviou...
In this paper we introduce parallel versions of two hierarchical memory models and give optimal algo...
The focus here is the power of some underexplored CRCW PRAMs, which are strictly more powerful than ...
We address the design of algorithms for multicores that are oblivious to machine parameters. We prop...
We introduce a model of parallel computation that retains the ideal properties of the PRAM by using ...
The Hierarchical PRAM (H-PRAM) [5] model is a dynamically partitionable PRAM, which charges for comm...
We introduce a model of parallel computation that retains the ideal properties of the PRAM by using ...
A companion paper has introduced the Hierarchical PRAM (H-PRAM) model of parallel computation, which...
AbstractWe consider the Block PRAM model of Aggarwal et al. (in "Proceedings, First Annual ACM Sympo...
Abstract. We study the problem of sorting on a parallel computer with limited communication bandwidt...
We investigate aspects of the performance of the EREW instance of the Hierarchical PRAM (H-PRAM) mod...
Two improved list-ranking algorithms are presented. The ``peeling-off'' algorithm leads to an optima...
The memories of real life computers usually have a hierarchical structure with levels like registers...
Processors have become faster at a much quicker rate than memory access time, creating wide gap betw...
We address the design of algorithms for multicores that are oblivious to machine parameters. We prop...
List ranking and list scan are two primitive operations used in many parallel algorithms that use li...
In this paper we introduce parallel versions of two hierarchical memory models and give optimal algo...
The focus here is the power of some underexplored CRCW PRAMs, which are strictly more powerful than ...
We address the design of algorithms for multicores that are oblivious to machine parameters. We prop...
We introduce a model of parallel computation that retains the ideal properties of the PRAM by using ...
The Hierarchical PRAM (H-PRAM) [5] model is a dynamically partitionable PRAM, which charges for comm...
We introduce a model of parallel computation that retains the ideal properties of the PRAM by using ...
A companion paper has introduced the Hierarchical PRAM (H-PRAM) model of parallel computation, which...
AbstractWe consider the Block PRAM model of Aggarwal et al. (in "Proceedings, First Annual ACM Sympo...
Abstract. We study the problem of sorting on a parallel computer with limited communication bandwidt...
We investigate aspects of the performance of the EREW instance of the Hierarchical PRAM (H-PRAM) mod...
Two improved list-ranking algorithms are presented. The ``peeling-off'' algorithm leads to an optima...
The memories of real life computers usually have a hierarchical structure with levels like registers...
Processors have become faster at a much quicker rate than memory access time, creating wide gap betw...
We address the design of algorithms for multicores that are oblivious to machine parameters. We prop...
List ranking and list scan are two primitive operations used in many parallel algorithms that use li...
In this paper we introduce parallel versions of two hierarchical memory models and give optimal algo...
The focus here is the power of some underexplored CRCW PRAMs, which are strictly more powerful than ...
We address the design of algorithms for multicores that are oblivious to machine parameters. We prop...