Rezaul Alam Chowdhury of Boston University presented a lecture on March 28, 2011 from 10:00 am to 11:00 am in room 1116 of the Klaus Advanced Computing Building on the Georgia Tech campus.Runtime: 51:10 minutes.Multicores represent a paradigm shift in general-purpose computing away from the von Neumann model to a collection of cores on a chip communicating through a cache hierarchy under a shared memory. Designing efficient algorithms for multicores is more challenging than that for traditional serial machines, as one must address both caching issues and shared-memory parallelism. As multicores with a wide range of machine parameters rapidly become the default desktop configuration, the need for efficient, portable code for them is growing....
Modern processors rely on cache memories to reduce the latency of data accesses. Extensive cache mis...
New architectures for extreme-scale computing need to be designed for higher energy efficiency than ...
Abstract. We present an oblivious machine, a concrete notion for a multiparty random access machine ...
We address the design of algorithms for multicores that are oblivious to machine parameters. We prop...
We address the design of algorithms for multicores that are oblivious to machine parameters. We prop...
In this paper we explore a simple and general approach for developing parallel algorithms that lead ...
In this paper we present randomized algorithms for sorting and convex hull that achieves optimal per...
www.dei.unipd.it/~silvest1 Communication is a major factor determining the performance of algorithms...
Memory efficiency and locality have substantial impact on the performance of programs, particularly ...
One of the challenges to achieving good performance on multicore architectures is the effective util...
Multi-core processors have become the dominant processor architecture with 2, 4, and 8 cores on a ch...
textThe ideal-cache model is an abstraction of the memory hierarchy in modern computers which facili...
As secure processors such as Intel SGX (with hyperthreading) become widely adopted, there is a growi...
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer S...
To scale applications on multicores up to bigger problems, software systems must be optimized both f...
Modern processors rely on cache memories to reduce the latency of data accesses. Extensive cache mis...
New architectures for extreme-scale computing need to be designed for higher energy efficiency than ...
Abstract. We present an oblivious machine, a concrete notion for a multiparty random access machine ...
We address the design of algorithms for multicores that are oblivious to machine parameters. We prop...
We address the design of algorithms for multicores that are oblivious to machine parameters. We prop...
In this paper we explore a simple and general approach for developing parallel algorithms that lead ...
In this paper we present randomized algorithms for sorting and convex hull that achieves optimal per...
www.dei.unipd.it/~silvest1 Communication is a major factor determining the performance of algorithms...
Memory efficiency and locality have substantial impact on the performance of programs, particularly ...
One of the challenges to achieving good performance on multicore architectures is the effective util...
Multi-core processors have become the dominant processor architecture with 2, 4, and 8 cores on a ch...
textThe ideal-cache model is an abstraction of the memory hierarchy in modern computers which facili...
As secure processors such as Intel SGX (with hyperthreading) become widely adopted, there is a growi...
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer S...
To scale applications on multicores up to bigger problems, software systems must be optimized both f...
Modern processors rely on cache memories to reduce the latency of data accesses. Extensive cache mis...
New architectures for extreme-scale computing need to be designed for higher energy efficiency than ...
Abstract. We present an oblivious machine, a concrete notion for a multiparty random access machine ...