In current microarchitectures, due to the complex memory hierarchies and different latencies on memory accesses, thread and data mapping are important issues to improve application performance. Software transactional memory (STM) is an abstraction used for thread synchronization, replacing the use of locks in parallel programming. Regarding thread and data mapping, STM presents new challenges and mapping opportunities, since (1) STM can use different conflict detection and resolution strategies, making the behavior of the application less predictable and; (2) the STM runtime has precise information about shared data and the intensity with each thread accesses them. These unique characteristics provide many opportunities for low-overhead, bu...
Chip Multithreading (CMT) processors promise to deliver higher performance by running more than one ...
International audienceA parallel program needs to manage the trade-off between the time spent in syn...
Software Transactional Memory (STM) can be defined as a generic nonblocking synchronization construc...
Abstract—Thread mapping has been extensively used as a technique to efficiently exploit memory hiera...
International audienceThread mapping has been extensively used as a technique to efficiently exploit...
International audienceThread mapping is an appealing approach to efficiently exploit the potential o...
Transactional Memory (TM) stands as a powerful paradigm for manipulating shared data in concurrent a...
With single thread performance hitting the power wall, hardware architects have turned to chip-level...
Exploiting thread-level parallelism has become a part of mainstream programming in recent years. Man...
Synchronization transparency offered by Software Transactional Memory (STM) must not come at the exp...
Synchronization transparency offered by Software Transactional Memory (STM) must not come at the exp...
International audienceTransactional Memory (TM) is a new programming paradigm that offers an alterna...
In state-of-the-art Software Transactional Memory (STM) systems, threads carry out the execution of ...
In state-of-the-art Software Transactional Memory (STM) systems, threads carry out the execution of ...
The advent of multicore processors has put the performance of traditional parallel programming techn...
Chip Multithreading (CMT) processors promise to deliver higher performance by running more than one ...
International audienceA parallel program needs to manage the trade-off between the time spent in syn...
Software Transactional Memory (STM) can be defined as a generic nonblocking synchronization construc...
Abstract—Thread mapping has been extensively used as a technique to efficiently exploit memory hiera...
International audienceThread mapping has been extensively used as a technique to efficiently exploit...
International audienceThread mapping is an appealing approach to efficiently exploit the potential o...
Transactional Memory (TM) stands as a powerful paradigm for manipulating shared data in concurrent a...
With single thread performance hitting the power wall, hardware architects have turned to chip-level...
Exploiting thread-level parallelism has become a part of mainstream programming in recent years. Man...
Synchronization transparency offered by Software Transactional Memory (STM) must not come at the exp...
Synchronization transparency offered by Software Transactional Memory (STM) must not come at the exp...
International audienceTransactional Memory (TM) is a new programming paradigm that offers an alterna...
In state-of-the-art Software Transactional Memory (STM) systems, threads carry out the execution of ...
In state-of-the-art Software Transactional Memory (STM) systems, threads carry out the execution of ...
The advent of multicore processors has put the performance of traditional parallel programming techn...
Chip Multithreading (CMT) processors promise to deliver higher performance by running more than one ...
International audienceA parallel program needs to manage the trade-off between the time spent in syn...
Software Transactional Memory (STM) can be defined as a generic nonblocking synchronization construc...