Abstract—Thread mapping has been extensively used as a technique to efficiently exploit memory hierarchy on modern chip-multiprocessors. It places threads on cores in order to amortize memory latency and/or to reduce memory contention. However, efficient thread mapping relies upon matching ap-plication behavior with system characteristics. Particularly, Software Transactional Memory (STM) applications introduce another dimension due to its runtime system support. Existing STM systems implement several conflict detection and reso-lution mechanisms, which leads STM applications to behave differently for each combination of these mechanisms. In this paper we propose a machine learning-based approach to automatically infer a suitable thread map...
Chip Multithreading (CMT) processors promise to deliver higher performance by running more than one ...
Many researchers have developed applications using transactional memory (TM) with the purpose of ben...
Multicore processors are now a mainstream approach to deliver higher performance to parallel applica...
International audienceThread mapping has been extensively used as a technique to efficiently exploit...
International audienceThread mapping is an appealing approach to efficiently exploit the potential o...
In current microarchitectures, due to the complex memory hierarchies and different latencies on memo...
Transactional Memory (TM) stands as a powerful paradigm for manipulating shared data in concurrent a...
One of the problems of Software-Transactional-Memory (STM) systems is the performance degradation th...
Transactional Memory (TM) is an emerging paradigm that promises to ease the development of parallel ...
In this paper we explore machine-learning approaches for dynamically selecting the well suited amoun...
There is tremendous diversity among the published algorithms for implementing Transactional Memory (...
Synchronization transparency offered by Software Transactional Memory (STM) must not come at the exp...
Synchronization transparency offered by Software Transactional Memory (STM) must not come at the exp...
In this article we exploit a combination of analytical and Machine Learning (ML) techniques in order...
Abstract-In this article we exploit a combination of analytical and Machine Learning (ML) techniques...
Chip Multithreading (CMT) processors promise to deliver higher performance by running more than one ...
Many researchers have developed applications using transactional memory (TM) with the purpose of ben...
Multicore processors are now a mainstream approach to deliver higher performance to parallel applica...
International audienceThread mapping has been extensively used as a technique to efficiently exploit...
International audienceThread mapping is an appealing approach to efficiently exploit the potential o...
In current microarchitectures, due to the complex memory hierarchies and different latencies on memo...
Transactional Memory (TM) stands as a powerful paradigm for manipulating shared data in concurrent a...
One of the problems of Software-Transactional-Memory (STM) systems is the performance degradation th...
Transactional Memory (TM) is an emerging paradigm that promises to ease the development of parallel ...
In this paper we explore machine-learning approaches for dynamically selecting the well suited amoun...
There is tremendous diversity among the published algorithms for implementing Transactional Memory (...
Synchronization transparency offered by Software Transactional Memory (STM) must not come at the exp...
Synchronization transparency offered by Software Transactional Memory (STM) must not come at the exp...
In this article we exploit a combination of analytical and Machine Learning (ML) techniques in order...
Abstract-In this article we exploit a combination of analytical and Machine Learning (ML) techniques...
Chip Multithreading (CMT) processors promise to deliver higher performance by running more than one ...
Many researchers have developed applications using transactional memory (TM) with the purpose of ben...
Multicore processors are now a mainstream approach to deliver higher performance to parallel applica...