Effects of direct tunneling and surface roughness on the capacitance-voltage characteristics of ultra-thin gate deep submicron MOS transistors have been studied. An improved equivalent circuit model to account for surface roughness and direct tunneling on the ultra-thin gate MOS capacitors in a unified manner is proposed. The capacitance subject to direct tunneling and surface roughness effect is smaller than that without surface roughness effect
The metal-insulator-semiconductor tunnel diodes with ultra thin metal surrounded gate (UTMSG) have b...
In deep submicrometer MOSFETs the device performances is limited by the parasitic capacitance. and r...
Scaling down of MOS device dimensions is accompanied by a decrease in gate-oxide thickness and an in...
Effects of direct tunneling and surface roughness on the capacitance-voltage characteristics of ultr...
The impact of the surface roughness on the gate tunneling and capacitance of ultra-thin gate dielect...
With the aggressive scaling down of MOS, the direct tunneling current will replace FN tunneling as t...
We have deduced the analytical expression of the tunneling current across a thin oxide layer for a M...
Interface roughness effects on direct tunneling current in ultrathin MOSFETs are investigated by num...
Interface roughness effects on tunneling current in ultrathin MOS structures are investigated theore...
An efficient direct tunneling current model is presented for the ultra thin gate dielectric MOS stru...
Interface roughness effects on tunneling currentin ultrathin MOS structures are investigatedtheoreti...
This paper presents a compact direct tunneling current model for circuit simulation to predict ultra...
Direct and Fowler-Nordheim tunneling through ultra-thin gate dielectrics is modeled based on a new a...
In many theoretical investigations of the electric-tunnel effect through an ultrathin oxide in metal...
textHigh dielectric constant materials are expected to replace SiO2 when the direct tunneling cur...
The metal-insulator-semiconductor tunnel diodes with ultra thin metal surrounded gate (UTMSG) have b...
In deep submicrometer MOSFETs the device performances is limited by the parasitic capacitance. and r...
Scaling down of MOS device dimensions is accompanied by a decrease in gate-oxide thickness and an in...
Effects of direct tunneling and surface roughness on the capacitance-voltage characteristics of ultr...
The impact of the surface roughness on the gate tunneling and capacitance of ultra-thin gate dielect...
With the aggressive scaling down of MOS, the direct tunneling current will replace FN tunneling as t...
We have deduced the analytical expression of the tunneling current across a thin oxide layer for a M...
Interface roughness effects on direct tunneling current in ultrathin MOSFETs are investigated by num...
Interface roughness effects on tunneling current in ultrathin MOS structures are investigated theore...
An efficient direct tunneling current model is presented for the ultra thin gate dielectric MOS stru...
Interface roughness effects on tunneling currentin ultrathin MOS structures are investigatedtheoreti...
This paper presents a compact direct tunneling current model for circuit simulation to predict ultra...
Direct and Fowler-Nordheim tunneling through ultra-thin gate dielectrics is modeled based on a new a...
In many theoretical investigations of the electric-tunnel effect through an ultrathin oxide in metal...
textHigh dielectric constant materials are expected to replace SiO2 when the direct tunneling cur...
The metal-insulator-semiconductor tunnel diodes with ultra thin metal surrounded gate (UTMSG) have b...
In deep submicrometer MOSFETs the device performances is limited by the parasitic capacitance. and r...
Scaling down of MOS device dimensions is accompanied by a decrease in gate-oxide thickness and an in...