The slowdown of Moore's law and the power wall necessitates a shift toward finely tunable precision (a.k.a.Transprecision) computing to reduce energy footprint. Hence, we need circuits capable of performing floating-point operations on a wide range of precisions with high energy proportionality. We present FPnew, a highly configurable open-source transprecision floating-point unit (TP-FPU), capable of supporting a wide range of standard and custom FP formats. To demonstrate the flexibility and efficiency of FPnew in general-purpose processor architectures, we extend the RISC-V ISA with operations on half-precision, bfloat16, and an 8-bit FP format, as well as SIMD vectors and multiformat operations. Integrated into a 32-bit RISC-V core, our...
In recent years approximate computing has been extensively explored as a paradigm to design hardware...
In the Internet-Of-Things (IoT) domain, microcontrollers (MCUs) are used to collect and process data...
This paper presents the design and the implementation of a fully combinatorial floating point unit (...
The slowdown of Moore's law and the power wall necessitates a shift toward finely tunable precision ...
In modern low-power embedded platforms, floating-point (FP) operations emerge as a major contributor...
The crisis of Moore's law and new dominant Machine Learning workloads require a paradigm shift towar...
Ultra-low power computing is a key enabler of deeply embedded platforms used in domains such as dist...
International audienceFull-precision Floating-Point Units (FPUs) can be a source of extensive hardwa...
Full-precision Floating-Point Units (FPUs) can be a source of extensive hardware overhead in general...
Abstract—Energy-efficient computation is critical if we are going to continue to scale performance i...
Reduced-precision floating-point (FP) arithmetic is being widely adopted to reduce memory footprint ...
International audienceFloating-Point (FP) computation using standard IEEE formats has a significant ...
International audienceIn recent years, Coarse Grain Reconfigurable Architecture (CGRA) accelerators ...
In recent years approximate computing has been extensively explored as a paradigm to design hardware...
In the Internet-Of-Things (IoT) domain, microcontrollers (MCUs) are used to collect and process data...
This paper presents the design and the implementation of a fully combinatorial floating point unit (...
The slowdown of Moore's law and the power wall necessitates a shift toward finely tunable precision ...
In modern low-power embedded platforms, floating-point (FP) operations emerge as a major contributor...
The crisis of Moore's law and new dominant Machine Learning workloads require a paradigm shift towar...
Ultra-low power computing is a key enabler of deeply embedded platforms used in domains such as dist...
International audienceFull-precision Floating-Point Units (FPUs) can be a source of extensive hardwa...
Full-precision Floating-Point Units (FPUs) can be a source of extensive hardware overhead in general...
Abstract—Energy-efficient computation is critical if we are going to continue to scale performance i...
Reduced-precision floating-point (FP) arithmetic is being widely adopted to reduce memory footprint ...
International audienceFloating-Point (FP) computation using standard IEEE formats has a significant ...
International audienceIn recent years, Coarse Grain Reconfigurable Architecture (CGRA) accelerators ...
In recent years approximate computing has been extensively explored as a paradigm to design hardware...
In the Internet-Of-Things (IoT) domain, microcontrollers (MCUs) are used to collect and process data...
This paper presents the design and the implementation of a fully combinatorial floating point unit (...