Special issue edited by Osman Hasan, Frédéric MalletInternational audienceThe growing trend to use multi-core processors to get more performance is increasingly present in safety-critical systems. Synchronous dataflow programming is naturally well-suited to parallel execution, thanks to the fact that all data dependencies are always explicit. MiniSIGNAL is a multi-task code generation tool for the synchronous dataflow language SIGNAL. The existing MiniSIGNAL code generation strategies mainly consider coarse-grained parallelism based on Ada multi-task model. However, when we applied it to industrial case studies, this code generation scheme has revealed inefficient: architecture aspects of the target platform have to be taken into account to...
The increased presence of parallel computing platforms bringsconcerns to the general purpose domain ...
With ubiquitous multi-core architectures, a major challenge is how to effectively use these machines...
Scaling up conventional processor architectures cannot translate the ever-increasing number of trans...
This paper describes how parallel dataflow programming can be simply and efficiently integrated with...
Over the last three decades, computer architects have been able to achieve an increase in performanc...
International audienceDataflow models of computation have early on been acknowledged as an attractiv...
International audienceEmbedded systems tend to require more and more computational power. Many-core ...
Abstract The Ada language has for long provided supportfor the development of reliable real-time sys...
In earlier work, we proposed extending Ada with a high-level parallel programming layer consisting ...
Declarative parallel programming languages express and control parallelism at a high level of abstr...
20th International Conference on Reliable Software Technologies - Ada-Europe 2015 (Ada-Europe 2015),...
Synchronous programming models capture concurrency in computation quite naturally, especially in its...
International Real-Time Ada Workshop (IRTAW 2015). 20 to 22, Apr, 2015. Pownal, U.S.A..The approach ...
Vita.The advances in hardware have made possible the application of multiple processors to the domai...
Data flow techniques have been around since the early ’70s when they were used in compilers for sequ...
The increased presence of parallel computing platforms bringsconcerns to the general purpose domain ...
With ubiquitous multi-core architectures, a major challenge is how to effectively use these machines...
Scaling up conventional processor architectures cannot translate the ever-increasing number of trans...
This paper describes how parallel dataflow programming can be simply and efficiently integrated with...
Over the last three decades, computer architects have been able to achieve an increase in performanc...
International audienceDataflow models of computation have early on been acknowledged as an attractiv...
International audienceEmbedded systems tend to require more and more computational power. Many-core ...
Abstract The Ada language has for long provided supportfor the development of reliable real-time sys...
In earlier work, we proposed extending Ada with a high-level parallel programming layer consisting ...
Declarative parallel programming languages express and control parallelism at a high level of abstr...
20th International Conference on Reliable Software Technologies - Ada-Europe 2015 (Ada-Europe 2015),...
Synchronous programming models capture concurrency in computation quite naturally, especially in its...
International Real-Time Ada Workshop (IRTAW 2015). 20 to 22, Apr, 2015. Pownal, U.S.A..The approach ...
Vita.The advances in hardware have made possible the application of multiple processors to the domai...
Data flow techniques have been around since the early ’70s when they were used in compilers for sequ...
The increased presence of parallel computing platforms bringsconcerns to the general purpose domain ...
With ubiquitous multi-core architectures, a major challenge is how to effectively use these machines...
Scaling up conventional processor architectures cannot translate the ever-increasing number of trans...