Multi-core Code Generation from Polychronous Programs with Time-Predictable Properties

Synchronous programming models capture concurrency in computation quite naturally, especially in its dataflow multi-clock (polychronous) flavor. With the rising importance of multi-core processors in safety-critical embedded systems or cyber-physical systems (CPS), there is a growing need for model- driven generation of multi-threaded code for multi-core systems. This ar- ticle proposes a methodology to build time-predictable systems on multi- core, based on synchronous-model development. At the modeling level, the synchronous abstraction allows deterministic functional specifications. Thus, synchronous programming is a good choice for predictable system de- sign. Additionally, real-time specifications are associated to the synchronous model. At the compiler level, the verified translation from the synchronous language SIGNAL to our intermediate representation S-CGA (a variant of guarded actions) and to multi-threaded code, should preserve predictability. At the platform level, we propose a time-predictable multi-core architecture model in AADL (Architecture Analysis and Design Language), and then we map the multi-threaded code to this model. Real-time specifications prop- agate down in the system hierarchy. Therefore, our method integrates time predictability across several design layers, and finally reduces the complexity of worst-case execution time (WCET) analysis