Multi-core Code Generation from Polychronous Programs with Time-Predictable Properties

Abstract. Synchronous programming models capture concurrency in computation quite naturally, especially in its dataflow multi-clock (poly-chronous) flavor. With the rising importance of multi-core processors in safety-critical embedded systems or cyber-physical systems (CPS), there is a growing need for model-driven generation of multi-threaded code for multi-core systems. This paper proposes a build method of time-predictable system on multi-core, based on synchronous-model devel-opment. At the modeling level, the synchronous abstraction allows de-terministic time semantics. Thus synchronous programming is a good choice for time-predictable system design. At the compiler level, the verified compiler from the synchronous language SIGNAL to our inter-mediate representation (S-CGA, a variant of guarded actions) and to multi-threaded code, preserves the time predictability. At the platfor-m level, we propose a time-predictable multi-core architecture model in AADL (Architecture Analysis and Design Language), and then we map the multi-threaded code to this model. Therefore, our method integrates time predictability across several design layers