Redundant Formats for Faster Floating-Point Addition

The current standard two-path floating-point arithmetic algorithm's latency is on the order of 2 lg n. The normalization required by the standard two-path algorithm leaves outputs in a normalized non-redundant form, which constrains any new approaches that try to improve upon the floating-point adder architecture. Reducing the latency of floating-point addition would help in all floating-point operations, especially in conditional branches that are present in iterative methods. In this work, we propose two similar approaches that reduce the latency, increase the throughput, and minimize the critical path of the floating-point adder architecture by pipelining the two log2 n operations of addition and a variable shift that inherently exist within both the far and near paths of the standard two-path algorithm. We leave the intermediate results in a redundant format in case they are needed by the immediate successor instruction. Whether or not the result is needed by the next instruction the intermediate redundant result has time to be converted to a normalized non-redundant form while the next addition occurs. We accomplish these goals while adhering to the input and output constraints of the IEEE standard for binary floating-point arithmetic