This work addresses the early exploration phase, before the hardware is available, of the design of a System on a Chip. We detect threads in C programs using a software only technique. The computed threads are used as a basis for partitioning the applications. The threads are built using profiling and hot-paths information. We use a speculative model that, contrary to previous approaches, does not assume a shared memory. The speculation is performed on control flow and data structure layout. The output of the proposed method is a set of threads characterized by their execution time, the amount of memory and communication required, etc. Preliminary results show that the approach is able to capture and to characterize the main computation ker...
Chip multiprocessors (CMPs), or multi-core processors, have become a common way of reducing chip com...
Part 1: Session 1: Parallel Programming and AlgorithmsInternational audienceInstruction traces play ...
Speculative thread-level parallelism has been recently proposed as a source of parallelism to improv...
This work addresses the early exploration phase, before the hardware is available, of the design of ...
International audienceThis work addresses the early exploration phase, before the hardware is availa...
Abstract. This work addresses the early exploration phase, before the hardware is available, of the ...
International audienceThis work addresses the early exploration phase, before the hardware is availa...
Trace-level speculative multithreaded processors exploit trace-level speculation by means of two thr...
Thread-level speculative execution is a technique that makes it pos-sible for a wider range of singl...
In this paper we present a processor microarchitecture that can simultaneously execute multiple thre...
In recent years, microprocessor manufacturers have shifted their focus from single-core to multi-cor...
Thesis for the degree of Licentiate of Engineering, a Swedish degree between M.Sc. and Ph.D. Thread-...
The basic idea under speculative parallelization (also called thread-level spec-ulation) [2, 6, 7] i...
Developments in parallel architectures are an important branch in computer science. The success of s...
A dynamic speculative multithreaded processor automatically extracts thread level parallelism from s...
Chip multiprocessors (CMPs), or multi-core processors, have become a common way of reducing chip com...
Part 1: Session 1: Parallel Programming and AlgorithmsInternational audienceInstruction traces play ...
Speculative thread-level parallelism has been recently proposed as a source of parallelism to improv...
This work addresses the early exploration phase, before the hardware is available, of the design of ...
International audienceThis work addresses the early exploration phase, before the hardware is availa...
Abstract. This work addresses the early exploration phase, before the hardware is available, of the ...
International audienceThis work addresses the early exploration phase, before the hardware is availa...
Trace-level speculative multithreaded processors exploit trace-level speculation by means of two thr...
Thread-level speculative execution is a technique that makes it pos-sible for a wider range of singl...
In this paper we present a processor microarchitecture that can simultaneously execute multiple thre...
In recent years, microprocessor manufacturers have shifted their focus from single-core to multi-cor...
Thesis for the degree of Licentiate of Engineering, a Swedish degree between M.Sc. and Ph.D. Thread-...
The basic idea under speculative parallelization (also called thread-level spec-ulation) [2, 6, 7] i...
Developments in parallel architectures are an important branch in computer science. The success of s...
A dynamic speculative multithreaded processor automatically extracts thread level parallelism from s...
Chip multiprocessors (CMPs), or multi-core processors, have become a common way of reducing chip com...
Part 1: Session 1: Parallel Programming and AlgorithmsInternational audienceInstruction traces play ...
Speculative thread-level parallelism has been recently proposed as a source of parallelism to improv...