Module-Level Speculative Execution Techniques on Chip Multiprocessors

Thesis for the degree of Licentiate of Engineering, a Swedish degree between M.Sc. and Ph.D. Thread-level parallelism is an increasingly popular target for improving computer system performance; architectures such as chip multiprocessors and multithreaded cores are designed to take advantage of parallel threads within a single chip. The performance of existing single-threaded programs can be improved with automatic parallelization and thread-level speculation; however, overheads associated with speculation can be a major hurdle towards achieving significant performance gains. This thesis investigates module-level parallelism, or spawning a speculative thread running the module continuation in parallel with the called module. The results of simulations with an ideal speculative chip multiprocessor show that execution time can potentially be, on average, halved with module-level parallelism, but that misspecula-tions are common and that speculation overheads dominate the execution time if new threads are started for every module continuation