The threshold voltage for the three different conduction components of an accumulation-mode PMOS SOI are experimentally extracted at room and liquid-helium temperatures. A deep-depletion transient effect is observed to play an important role when one of the interfaces is in inversion, even at room temperature. An intuitive physical interpretation is given for the suppression of some current components at liquid-helium temperatures. In addition, a simple model for calculating the silicon-film thickness and the doping level is presented
Fully Depleted (FD) SOI technology is well known to provide improved analog performance of CMOS tran...
Operation of fully depleted inversion mode SOI n-MOSFET, fabricated on UNIBOND wafers, in wide range...
This paper presents the operation of Graded-Channel (GC) Silicon-On-Insulator (SOI) nMOSFETs at low ...
In this work a theoretical and experimental analysis of the substrate potential drop influence on fu...
A theoretical analysis of the physics of accumulation-mode SOI p-MOSFET's is supported by new experi...
Accumulation-mode PMOS transistors on SOI are characterized by several conduction mechanisms. Measu...
Measurements of accumulation-mode (AM) MOS SOI transistors in the 150-300-degrees-C temperature rang...
This work reports, for the first time, the operation of Graded-Channel SOI nMOSFETs at liquid helium...
Intrinsic gate-capacitance characteristics of long-channel SOI MOSFETs are investigated by measureme...
A back-accumulation conduction mechanism ignored in previously-published analyses is shown to be the...
The behavior of single and double gate accumulation mode silicon-on-insulator (SOI) metal oxide semi...
In this work, we analyze the conduction mechanisms and the electrical performance of intrinsic and d...
In this work is presented a theoretical and experimental analysis of the substrate potential drop an...
The threshold voltage and capacitance voltage characteristics of ultra-thin Silicon-on-Insulator MOS...
In this paper, a simple but accurate semi analytical charge sheet model is presented for threshold v...
Fully Depleted (FD) SOI technology is well known to provide improved analog performance of CMOS tran...
Operation of fully depleted inversion mode SOI n-MOSFET, fabricated on UNIBOND wafers, in wide range...
This paper presents the operation of Graded-Channel (GC) Silicon-On-Insulator (SOI) nMOSFETs at low ...
In this work a theoretical and experimental analysis of the substrate potential drop influence on fu...
A theoretical analysis of the physics of accumulation-mode SOI p-MOSFET's is supported by new experi...
Accumulation-mode PMOS transistors on SOI are characterized by several conduction mechanisms. Measu...
Measurements of accumulation-mode (AM) MOS SOI transistors in the 150-300-degrees-C temperature rang...
This work reports, for the first time, the operation of Graded-Channel SOI nMOSFETs at liquid helium...
Intrinsic gate-capacitance characteristics of long-channel SOI MOSFETs are investigated by measureme...
A back-accumulation conduction mechanism ignored in previously-published analyses is shown to be the...
The behavior of single and double gate accumulation mode silicon-on-insulator (SOI) metal oxide semi...
In this work, we analyze the conduction mechanisms and the electrical performance of intrinsic and d...
In this work is presented a theoretical and experimental analysis of the substrate potential drop an...
The threshold voltage and capacitance voltage characteristics of ultra-thin Silicon-on-Insulator MOS...
In this paper, a simple but accurate semi analytical charge sheet model is presented for threshold v...
Fully Depleted (FD) SOI technology is well known to provide improved analog performance of CMOS tran...
Operation of fully depleted inversion mode SOI n-MOSFET, fabricated on UNIBOND wafers, in wide range...
This paper presents the operation of Graded-Channel (GC) Silicon-On-Insulator (SOI) nMOSFETs at low ...