A design methodology for secured ICs using dynamic current mode logic

This paper presents principles and concepts for the secured design of cryptographic IC's. In order to achieve a secure implementation of those structures, we propose to use a Binary Decision Diagrams (BDDs) approach to design and determine the most secured structures in Dynamic Current Mode Logic. We apply a BDD based prediction to the power consumption of some gates, validate our model using SPICE simulations, and use it to mount efficient power analysis attacks on a component of a cryptographic algorithm. Moreover, relying on our simulation results, we propose a complete methodology based on our BDD model to obtain secured IC's, from the boolean function to the final circuit layout