An opposite side floating gate flash memory scalable to 20 nm length

An opposite side floating gate FLASH memory cell structure based on double-gate metal oxide semiconductor field effect transistors (MOSFET) was proposed. The structure decouple the write/erase process with the read process so that a thick gate oxide was used in write/erase process to preserve non-volatility and a thin gate oxide was used in read/standby mode. Simulation results showed that FLASH scaling to the 20nm node was possible using this structure