This paper presents a design methodology for deriving an FPGA implementation directly from a mathematical specification, thus avoiding the switch in semantic perspective as is present in widely applied methods which include an imperative implementation as an intermediate step. The first step in the method presented in this paper is to transform a mathematical specification into a Haskell program. The next step is to make repetition structures explicit by higher order functions, and after that rewrite the specification in the form of a Mealy Machine. Finally, adaptations have to be made in order to comply to the fixed nature of hardware. The result is then given to CaSH, a compiler which generates synthesizable VHDL from the resulting Haskel...
Network-on-Chip (NoC) introduces parallelism in communications and emerges with the growing integrat...
To provide high performance at practical power levels, tomorrow’s chips will have to consist primari...
Field programmable gate arrays or FPGAs are the Swiss army knife of the compute accelerators. They a...
Today the hardware for embedded systems is often specified in VHDL. However, VHDL describes the syst...
In order to effectively utilize the growing number of resources available on FPGAs, higher level abs...
Through a series of mechanical, semantics-preserving transformations, I show how a three-line recurs...
We present a library in Haskell for programming Field Programmable Gate Arrays (FPGAs), including ha...
We present a library in Haskell for programming Field Programmable Gate Arrays (FPGAs), including ha...
The amount of resources available on reconfigurable logic devices like FPGAs has seen a tremendous g...
Through a series of mechanical transformation, I show how a three-line recursive Haskell function (F...
Field Programmable Gate Array (FPGA) provides the ability to use, and re-use, hardware with minimal ...
Increases in the capacities and features of FPGAs has opened a new perspective on their use as appli...
This book is designed both for FPGA users interested in developing new, specific components - genera...
Until relatively recently, users of FPGA-based computers have needed electronic-design skills to imp...
We explain how programs specified in a sequential programming language can be translated automatical...
Network-on-Chip (NoC) introduces parallelism in communications and emerges with the growing integrat...
To provide high performance at practical power levels, tomorrow’s chips will have to consist primari...
Field programmable gate arrays or FPGAs are the Swiss army knife of the compute accelerators. They a...
Today the hardware for embedded systems is often specified in VHDL. However, VHDL describes the syst...
In order to effectively utilize the growing number of resources available on FPGAs, higher level abs...
Through a series of mechanical, semantics-preserving transformations, I show how a three-line recurs...
We present a library in Haskell for programming Field Programmable Gate Arrays (FPGAs), including ha...
We present a library in Haskell for programming Field Programmable Gate Arrays (FPGAs), including ha...
The amount of resources available on reconfigurable logic devices like FPGAs has seen a tremendous g...
Through a series of mechanical transformation, I show how a three-line recursive Haskell function (F...
Field Programmable Gate Array (FPGA) provides the ability to use, and re-use, hardware with minimal ...
Increases in the capacities and features of FPGAs has opened a new perspective on their use as appli...
This book is designed both for FPGA users interested in developing new, specific components - genera...
Until relatively recently, users of FPGA-based computers have needed electronic-design skills to imp...
We explain how programs specified in a sequential programming language can be translated automatical...
Network-on-Chip (NoC) introduces parallelism in communications and emerges with the growing integrat...
To provide high performance at practical power levels, tomorrow’s chips will have to consist primari...
Field programmable gate arrays or FPGAs are the Swiss army knife of the compute accelerators. They a...