Through a series of mechanical, semantics-preserving transformations, I show how a three-line recursive Haskell program (Fibonacci) can be transformed to a hardware description language -- Verilog -- that can be synthesized on an FPGA. This report lays groundwork for a compiler that will perform this transformation automatically
Field Programmable Gate Arrays (FPGAs) have the unique ability to be configured into application-spe...
Over the last three decades, the number of transistors used in microchips has increased by three ord...
This article addresses the development of complex, heavily parameterized and flexible operators to b...
Through a series of mechanical transformation, I show how a three-line recursive Haskell function (F...
Abstraction in hardware description languages stalled at the register-transfer level decades ago, ye...
To provide high performance at practical power levels, tomorrow’s chips will have to consist primari...
Recursive functions and data types pose significant challenges for a Haskell-to-hardware compiler. D...
This paper presents a design methodology for deriving an FPGA implementation directly from a mathema...
We present an algorithm for unrolling recursion in the Haskell functional language. Adapted from a s...
Reconfigurable computing, in which general purpose processor (GPP) is augmented with one or more FPG...
The amount of resources available on reconfigurable logic devices like FPGAs has seen a tremendous g...
Today the hardware for embedded systems is often specified in VHDL. However, VHDL describes the syst...
This paper introduces CλaSH, a novel hardware specification environment, by discussing several non-t...
In order to effectively utilize the growing number of resources available on FPGAs, higher level abs...
This thesis contains a collection of work I have performed while working on Dr. Erik Perrins' Effici...
Field Programmable Gate Arrays (FPGAs) have the unique ability to be configured into application-spe...
Over the last three decades, the number of transistors used in microchips has increased by three ord...
This article addresses the development of complex, heavily parameterized and flexible operators to b...
Through a series of mechanical transformation, I show how a three-line recursive Haskell function (F...
Abstraction in hardware description languages stalled at the register-transfer level decades ago, ye...
To provide high performance at practical power levels, tomorrow’s chips will have to consist primari...
Recursive functions and data types pose significant challenges for a Haskell-to-hardware compiler. D...
This paper presents a design methodology for deriving an FPGA implementation directly from a mathema...
We present an algorithm for unrolling recursion in the Haskell functional language. Adapted from a s...
Reconfigurable computing, in which general purpose processor (GPP) is augmented with one or more FPG...
The amount of resources available on reconfigurable logic devices like FPGAs has seen a tremendous g...
Today the hardware for embedded systems is often specified in VHDL. However, VHDL describes the syst...
This paper introduces CλaSH, a novel hardware specification environment, by discussing several non-t...
In order to effectively utilize the growing number of resources available on FPGAs, higher level abs...
This thesis contains a collection of work I have performed while working on Dr. Erik Perrins' Effici...
Field Programmable Gate Arrays (FPGAs) have the unique ability to be configured into application-spe...
Over the last three decades, the number of transistors used in microchips has increased by three ord...
This article addresses the development of complex, heavily parameterized and flexible operators to b...
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