Memory Efficient Software Synthesis with Mixed Coding Style from Dataflow Graphs

This paper presents a set of techniques to reduce the code and data sizes for software synthesis from graphical digital signal-processing programs based on the synchronous dataflow model. By sharing the kernel code among multiple instances of a block with a shared function, we can further reduce the code size below the previous results based on inline coding style. A systematic approach also is devised to give up the single appearance schedule for reducing the data buffer requirement. The proposed techniques have been evaluated with two real-life examples to prove their significance.This work was supported by the academic fund of Ministry of Education, Republic of Korea, through the Inter- University Semiconductor Research Center, Seoul National University, under ISRC-98-E-2103