Based on the model of synchronous data flow (SDF) [13], so called single appearance schedules are known to provide memory-optimal schedules. Among these, the problem of buffer memory optimization is treated: (1) An Evolutionary Algorithm (EA) is applied to efficiently explore the (in general) exponential search space of actor firing orders. (2) For each order, the buffer costs are evaluated by applying a dynamic programming post-optimization step (GDPPO). Introduction Dataflow specifications are widespread in areas of digital signal and image processing. Synchronous dataflow (SDF) graphs [13] present a class of dataflow in which the nodes, called actors have a simple firing rule: The number of data values (tokens, samples) produced and con...
The paper presents an algorithm to determine the close-to-smallest possible data buffer sizes for ar...
The synchronous dataflow (SDF) model has proven efficient for represent-ing an important class of di...
There has been a proliferation of block-diagram environments for specifying and prototyping DSP sys-...
This paper addresses the problem of trading-off between the minimization of program and data memory ...
This paper addresses the problem of trading-off between the minimization of program and data memory ...
This paper addresses the problem of trading-off between the minimization of program and data memory ...
In the context of digital signal processing, synchronous data flow (SDF) graphs [12] are widely used...
International audienceThis paper introduces and assesses a new technique to minimize the memory foot...
textMany digital signal processing and real-time streaming systems are modeled using dataflow graphs...
When implementing software for programmable digital signal processors (PDSPs), the design space is d...
T his paper addresses trade-offs between the minimization of program memory and data memory requirem...
Dataflow has proven to be an attractive computational model for programming DSP applications. A rest...
ssb engumdedu The simultaneous exploration of tradeos be tween program memory data memory and ex ec...
In multimedia and graphics applications, data samples of nonprimitive type require significant amoun...
Though synchronous dataflow (SDF) graph has been a successful input specification language for digit...
The paper presents an algorithm to determine the close-to-smallest possible data buffer sizes for ar...
The synchronous dataflow (SDF) model has proven efficient for represent-ing an important class of di...
There has been a proliferation of block-diagram environments for specifying and prototyping DSP sys-...
This paper addresses the problem of trading-off between the minimization of program and data memory ...
This paper addresses the problem of trading-off between the minimization of program and data memory ...
This paper addresses the problem of trading-off between the minimization of program and data memory ...
In the context of digital signal processing, synchronous data flow (SDF) graphs [12] are widely used...
International audienceThis paper introduces and assesses a new technique to minimize the memory foot...
textMany digital signal processing and real-time streaming systems are modeled using dataflow graphs...
When implementing software for programmable digital signal processors (PDSPs), the design space is d...
T his paper addresses trade-offs between the minimization of program memory and data memory requirem...
Dataflow has proven to be an attractive computational model for programming DSP applications. A rest...
ssb engumdedu The simultaneous exploration of tradeos be tween program memory data memory and ex ec...
In multimedia and graphics applications, data samples of nonprimitive type require significant amoun...
Though synchronous dataflow (SDF) graph has been a successful input specification language for digit...
The paper presents an algorithm to determine the close-to-smallest possible data buffer sizes for ar...
The synchronous dataflow (SDF) model has proven efficient for represent-ing an important class of di...
There has been a proliferation of block-diagram environments for specifying and prototyping DSP sys-...