S.: Memory efficient software synthesis from dataflow graph

Due to the limited amount of memory resources in em-bedded systems, minimizing the memory requirements is an important goal of software synthesis. This paper presents a set of techniques to reduce the code and data size for soft-ware synthesis from graphical DSP programs based on the synchronous dataflow (SDF) model. By sharing the kernel code among multiple instances of a block, we can further reduce the code size below the single appearance sched-ule. And, a systematic approach is presented to give up single appearance schedules to reduce the data buffer re-quirements. Experimental results from two real examples prove the significance of the proposed techniques.