Add to ORKGFor a few decades, CMOS has been well known for a quite efficient design methodology. With its unique characteristics, CMOS logic has been most commonly used for low voltage operation. Although in many cases CMOS logic can achieve more robust performance than pass-transistor logic and Dynamic Logic counterparts, due to the fact that the delay o f low voltage CMOS has been degraded significantly, it is unpractical in many applications. So a novel logic family called dual mode logic (DML) which can be switched between static and dynamic operation modes with a clock control signal is introduced. In the dissertation I introduce the basic DML circuit structure as well as the operation. DML gates present the advantages o f both static and dynamic...
Power consumption is always the key problem for the digital circuit design. Also, information leaked...
In this work, MOS Current Mode Logic (MCML) is analyzed for low power, low noise, mixed signal appli...
A new differential static CMOS logic (DSCL) family is devised. The new circuit is fully static, maki...
For a few decades, CMOS has been well known for a quite efficient design methodology. With its uniqu...
Dual mode logic (DML) with both static and dynamic modes is able to solve severe delay of CMOS in lo...
In recent years, the major focus of VLSI design has shifted from high-speed to low-power consumption...
In this paper, we realize a high performance arithmetic circuits which is faster and have lower powe...
A novel dual mode logic (DML) model has a superior energy-performance compare to CMOS logic. The DML...
Dottorato in Information and Communication Technologies, Ciclo XXXIThe ever growing technological pr...
This paper proposes hybrid dynamic current mode logic (H-DyCML) as an alternative to existing dynami...
A novel dual mode logic (DML) model has a superior energy-performance compare to CMOS logic. The DML...
With the growing demands of portable devices, it is necessary to pay attention to low-power digital ...
The bulk of the power consumption for conventional CMOS dynamic logic is usually contributed as a...
Dynamic Logic is used in high performance circuit designs for its high speed and less transistor ...
Dual-rail CMOS logic, also called as differential CMOS logic handles both true and complementary si...
Power consumption is always the key problem for the digital circuit design. Also, information leaked...
In this work, MOS Current Mode Logic (MCML) is analyzed for low power, low noise, mixed signal appli...
A new differential static CMOS logic (DSCL) family is devised. The new circuit is fully static, maki...
For a few decades, CMOS has been well known for a quite efficient design methodology. With its uniqu...
Dual mode logic (DML) with both static and dynamic modes is able to solve severe delay of CMOS in lo...
In recent years, the major focus of VLSI design has shifted from high-speed to low-power consumption...
In this paper, we realize a high performance arithmetic circuits which is faster and have lower powe...
A novel dual mode logic (DML) model has a superior energy-performance compare to CMOS logic. The DML...
Dottorato in Information and Communication Technologies, Ciclo XXXIThe ever growing technological pr...
This paper proposes hybrid dynamic current mode logic (H-DyCML) as an alternative to existing dynami...
A novel dual mode logic (DML) model has a superior energy-performance compare to CMOS logic. The DML...
With the growing demands of portable devices, it is necessary to pay attention to low-power digital ...
The bulk of the power consumption for conventional CMOS dynamic logic is usually contributed as a...
Dynamic Logic is used in high performance circuit designs for its high speed and less transistor ...
Dual-rail CMOS logic, also called as differential CMOS logic handles both true and complementary si...
Power consumption is always the key problem for the digital circuit design. Also, information leaked...
In this work, MOS Current Mode Logic (MCML) is analyzed for low power, low noise, mixed signal appli...
A new differential static CMOS logic (DSCL) family is devised. The new circuit is fully static, maki...