Framework to port neural networks to FPGA, suitable for realtime signal processing

Due to their hardware architecture, Field Programmable Gate Arrays (FPGAs) are optimally suited for the implementation of machine learning algorithms. So far, it is cumbersome to port a neural network (NN) to an FPGA. A frequently used solution is the implementation of NNs using the Open Compute Language (OpenCL) which can be converted to HDL code for use in the FPGA. While OpenCL supports the development of NN algorithms, it also adds unnecessary overhead to the FPGA netlist, limiting the performance of the FPGA. We have developed a framework for the conversion of fully connected, 1D- and 2D-convolutional NN layers to VHDL ode. The framework converts NN models that are trained in TensorFlow or Keras to a synthesizable VHDL code and creates a C model and testbench for verification. This enables nonlinear signal processing with NNs in real-time directly in the FPGA without the use of an embedded CPU