Instruction Transfer and Storage Exploration

This work aims to reduce the power consumed in the instruction memory of instruction set processors by doing code transformations. Code transformations such as loop splitting, code hoisting and loop peeling reduce the static size of active code at a certain moment in time. Since there is less code to store, smaller and thus less power consuming memories are needed. Other (control flow) transformations try to reduce the number of times a piece of code has to be loaded from the higher level memory. 1 Overview First we will motivate our work (Section 2). Then we introduce the related/previous work (Section 3), including the methodology to reduce power in data memory (DTSE) and the instruction memory hierarchy model. Section 4 gives an overview of useful code transformations. Some preliminary results are shown in the last section.