Speculative execution, such as control speculation or data speculation, is an effective way to improve program performance. Using edge/path profile information or simple heuristic rules, existing compiler frameworks can adequately incorporate and exploit control speculation. However, very little has been done so far to allow existing compiler frameworks to incorporate and exploit data speculation effectively in various program transformations beyond instruction scheduling. This paper proposes a speculative SSA form to incorporate information from alias profiling and/or heuristic rules for data speculation, thus allowing existing frameworks to be extended to support both control and data speculation. Such a general framework is very useful f...
Thread-level speculative execution is a technique that makes it pos-sible for a wider range of singl...
Abstract- A compile-time analysis technique is developed to derive the probability with which a user...
Value speculation has the potential of extending instruction level parallelism by breaking the barri...
The available instruction level parallelism (ILP) is extremely limited within basic blocks of non-nu...
The pervasive use of pointers with complicated patterns in C programs often constrains compiler alia...
The major specific contributions are: (1) We introduce a new compiler analysis to identify the memor...
Trace-level speculative multithreaded processors exploit trace-level speculation by means of two thr...
Abstract. The traditional target machine of a parallelizing compiler can execute code sections eithe...
We propose a formal definition for (valid) speculative computa-tions, which is independent of any im...
Effectively utilizing available parallelism is becoming harder and harder as systems evolve to many-...
Control and data flow speculation can improve processor performance through increased ILP. First it ...
With processor vendors pursuing multicore products, often at the expense of the complexity and aggre...
Although compiler optimization techniques are standard and successful in non-real-time systems, if n...
This paper proposes a new compiler technique that enables speculative execution of alternative progr...
84 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2009.I demonstrate that explicit sp...
Thread-level speculative execution is a technique that makes it pos-sible for a wider range of singl...
Abstract- A compile-time analysis technique is developed to derive the probability with which a user...
Value speculation has the potential of extending instruction level parallelism by breaking the barri...
The available instruction level parallelism (ILP) is extremely limited within basic blocks of non-nu...
The pervasive use of pointers with complicated patterns in C programs often constrains compiler alia...
The major specific contributions are: (1) We introduce a new compiler analysis to identify the memor...
Trace-level speculative multithreaded processors exploit trace-level speculation by means of two thr...
Abstract. The traditional target machine of a parallelizing compiler can execute code sections eithe...
We propose a formal definition for (valid) speculative computa-tions, which is independent of any im...
Effectively utilizing available parallelism is becoming harder and harder as systems evolve to many-...
Control and data flow speculation can improve processor performance through increased ILP. First it ...
With processor vendors pursuing multicore products, often at the expense of the complexity and aggre...
Although compiler optimization techniques are standard and successful in non-real-time systems, if n...
This paper proposes a new compiler technique that enables speculative execution of alternative progr...
84 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2009.I demonstrate that explicit sp...
Thread-level speculative execution is a technique that makes it pos-sible for a wider range of singl...
Abstract- A compile-time analysis technique is developed to derive the probability with which a user...
Value speculation has the potential of extending instruction level parallelism by breaking the barri...