This paper proposes a new compiler technique that enables speculative execution of alternative program paths. In our approach separate threads are generated that simultaneously speculate on the outcome of branches and that may run in parallel. Our technique goes beyond the capabilities of usual global instruction scheduling algorithms, because we overcome the restrictions to speculative instruction movement introduced by branches that could not be handled. The architectural requirements are the ability to run two or more threads in parallel and an enhanced instruction set to control threads. Our technique aims at simultaneous multithreaded, nanothreaded, and microthreaded processors, but can be modified for multiscalar, datascalar, and trac...
Speculative multithreading $(SpMT)$ promises to be an effective mechanism for parallelizing non-nume...
Thread-level speculative execution is a technique that makes it pos-sible for a wider range of singl...
[[abstract]]Speculative multithreading (SpMT) architecture can exploit thread-level parallelism that...
Commodity microprocessors uniformly apply branch prediction and single path speculative execution to...
The major specific contributions are: (1) We introduce a new compiler analysis to identify the memor...
Research on compiler techniques for thread-level loop speculation has so far remained on studying it...
Trace-level speculative multithreaded processors exploit trace-level speculation by means of two thr...
Trends in processor architecture and design suggest that static speculation will become a candidate...
To reduce the effect of thread overheads when executing small threads in speculative mul-tithreading...
The available instruction level parallelism (ILP) is extremely limited within basic blocks of non-nu...
In this paper we present a novel processor microarchitecture that relieves four of the most importan...
A dynamic speculative multithreaded processor automatically extracts thread level parallelism from s...
Speculative multithreading (SpMT) promises to be an effective mechanism for parallelizing nonnumeric...
Abstract. The traditional target machine of a parallelizing compiler can execute code sections eithe...
The current trend towardmulticore architectures has placed great pressure on programmers and compile...
Speculative multithreading $(SpMT)$ promises to be an effective mechanism for parallelizing non-nume...
Thread-level speculative execution is a technique that makes it pos-sible for a wider range of singl...
[[abstract]]Speculative multithreading (SpMT) architecture can exploit thread-level parallelism that...
Commodity microprocessors uniformly apply branch prediction and single path speculative execution to...
The major specific contributions are: (1) We introduce a new compiler analysis to identify the memor...
Research on compiler techniques for thread-level loop speculation has so far remained on studying it...
Trace-level speculative multithreaded processors exploit trace-level speculation by means of two thr...
Trends in processor architecture and design suggest that static speculation will become a candidate...
To reduce the effect of thread overheads when executing small threads in speculative mul-tithreading...
The available instruction level parallelism (ILP) is extremely limited within basic blocks of non-nu...
In this paper we present a novel processor microarchitecture that relieves four of the most importan...
A dynamic speculative multithreaded processor automatically extracts thread level parallelism from s...
Speculative multithreading (SpMT) promises to be an effective mechanism for parallelizing nonnumeric...
Abstract. The traditional target machine of a parallelizing compiler can execute code sections eithe...
The current trend towardmulticore architectures has placed great pressure on programmers and compile...
Speculative multithreading $(SpMT)$ promises to be an effective mechanism for parallelizing non-nume...
Thread-level speculative execution is a technique that makes it pos-sible for a wider range of singl...
[[abstract]]Speculative multithreading (SpMT) architecture can exploit thread-level parallelism that...