Speculative multithreading (SpMT) promises to be an effective mechanism for parallelizing nonnumeric programs, which tend to have irregular and pointer-intensive data structures and complex flows of control. Proper thread formation is crucial for obtaining good speedup in an SpMT system. This paper presents a compiler framework for partitioning a sequential program into multiple threads for parallel execution in an SpMT system. This framework is very general and supports speculative threads, nonspeculative threads, loop-centric threads, and out-of-order thread spawning. It is therefore useful for compiling for a wide variety of SpMT architectures. For effective partitioning of programs, the compiler uses profiling, interprocedural pointer a...
Speculative multithreading has been recently proposed to boost performance by means of exploiting th...
Speculative multithreading holds the potential to substantially improve the execution performance of...
In this paper we present a processor microarchitecture that can simultaneously execute multiple thre...
Speculative multithreading $(SpMT)$ promises to be an effective mechanism for parallelizing non-nume...
[[abstract]]Speculative multithreading (SpMT) architecture can exploit thread-level parallelism that...
Speculative Multi-Threading (SpMT) can improve single-threaded application performance using the mul...
Speculative multithreading (SpMT) architecture can ex-ploit thread-level parallelism that cannot be ...
Dual-core, quad-core and many-core processors are replacing the traditional single-core processors. ...
This paper proposes a new compiler technique that enables speculative execution of alternative progr...
The current trend towardmulticore architectures has placed great pressure on programmers and compile...
The emerging hardware support for thread-level speculation opens new opportunities to parallelize se...
The current trend toward chip multiprocessor architectures has placed great pressure on programmers ...
The major specific contributions are: (1) We introduce a new compiler analysis to identify the memor...
Speculative multithreading (SpMT) is a thread-level automatic parallelization technique that can acc...
Exploiting better performance from computer programs translates to finding more instructions to exec...
Speculative multithreading has been recently proposed to boost performance by means of exploiting th...
Speculative multithreading holds the potential to substantially improve the execution performance of...
In this paper we present a processor microarchitecture that can simultaneously execute multiple thre...
Speculative multithreading $(SpMT)$ promises to be an effective mechanism for parallelizing non-nume...
[[abstract]]Speculative multithreading (SpMT) architecture can exploit thread-level parallelism that...
Speculative Multi-Threading (SpMT) can improve single-threaded application performance using the mul...
Speculative multithreading (SpMT) architecture can ex-ploit thread-level parallelism that cannot be ...
Dual-core, quad-core and many-core processors are replacing the traditional single-core processors. ...
This paper proposes a new compiler technique that enables speculative execution of alternative progr...
The current trend towardmulticore architectures has placed great pressure on programmers and compile...
The emerging hardware support for thread-level speculation opens new opportunities to parallelize se...
The current trend toward chip multiprocessor architectures has placed great pressure on programmers ...
The major specific contributions are: (1) We introduce a new compiler analysis to identify the memor...
Speculative multithreading (SpMT) is a thread-level automatic parallelization technique that can acc...
Exploiting better performance from computer programs translates to finding more instructions to exec...
Speculative multithreading has been recently proposed to boost performance by means of exploiting th...
Speculative multithreading holds the potential to substantially improve the execution performance of...
In this paper we present a processor microarchitecture that can simultaneously execute multiple thre...