Speculative multithreading holds the potential to substantially improve the execution performance of sequential programs by leveraging the resources of multiple execution contexts (e.g., processors or threads). For unstructured non-numeric programs, the three key challenges of parallelization are (1) predicting the sequence of tasks (i.e., groups of instructions) that corresponds to the correct sequential execution of the program, (2) providing each task with the values it needs to execute (i.e., its live-in values), and (3) tolerating the communication latency between processors
With speculative thread-level parallelization, codes that cannot be fully compiler-analyzed are aggr...
In this paper we present a novel processor hardware architecture that relieves three of the most imp...
The emerging hardware support for thread-level speculation opens new opportunities to parallelize se...
Effectively utilizing available parallelism is becoming harder and harder as systems evolve to many-...
Speculative parallelization is a technique that tries to extract parallelism of loops that can not b...
This paper presents the Mitosis framework, which is a combined hardware-software approach to specula...
To achieve good performance on modern hardware, software must be designed with a high degree of para...
Exploiting better performance from computer programs translates to finding more instructions to exec...
The basic idea under speculative parallelization (also called thread-level spec-ulation) [2, 6, 7] i...
In this paper we present a processor microarchitecture that can simultaneously execute multiple thre...
The major specific contributions are: (1) We introduce a new compiler analysis to identify the memor...
The current trend towardmulticore architectures has placed great pressure on programmers and compile...
Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Comput...
Abstract. The traditional target machine of a parallelizing compiler can execute code sections eithe...
We present a novel processor microarchitecture that relieves three of the most important bottlenecks...
With speculative thread-level parallelization, codes that cannot be fully compiler-analyzed are aggr...
In this paper we present a novel processor hardware architecture that relieves three of the most imp...
The emerging hardware support for thread-level speculation opens new opportunities to parallelize se...
Effectively utilizing available parallelism is becoming harder and harder as systems evolve to many-...
Speculative parallelization is a technique that tries to extract parallelism of loops that can not b...
This paper presents the Mitosis framework, which is a combined hardware-software approach to specula...
To achieve good performance on modern hardware, software must be designed with a high degree of para...
Exploiting better performance from computer programs translates to finding more instructions to exec...
The basic idea under speculative parallelization (also called thread-level spec-ulation) [2, 6, 7] i...
In this paper we present a processor microarchitecture that can simultaneously execute multiple thre...
The major specific contributions are: (1) We introduce a new compiler analysis to identify the memor...
The current trend towardmulticore architectures has placed great pressure on programmers and compile...
Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Comput...
Abstract. The traditional target machine of a parallelizing compiler can execute code sections eithe...
We present a novel processor microarchitecture that relieves three of the most important bottlenecks...
With speculative thread-level parallelization, codes that cannot be fully compiler-analyzed are aggr...
In this paper we present a novel processor hardware architecture that relieves three of the most imp...
The emerging hardware support for thread-level speculation opens new opportunities to parallelize se...