Eliminating Squashes Through Learning Cross-Thread Violations in Speculative Parallelization for Multiprocessors £ ABSTRACT

With speculative thread-level parallelization, codes that cannot be fully compiler-analyzed are aggressively executed in parallel. If the hardware detects a cross-thread dependence violation, it squashes offending threads and resumes execution. Unfortunately, frequent squashing cripples performance. This paper proposes a new frameworkof hardware mechanisms to eliminate most squashes due to data dependences in multiprocessors. The frameworkworks by learning and predicting violations, and applying delayed disambiguation, value prediction, and stall and release. The frameworkis suited for directory-based multiprocessors that trackmemory accesses at the system level with the coarse granularity of memory lines. Simulations of a 16-processor machine show that the frameworkis very effective. By adding our frameworkto a speculative CC-NUMA with 64-byte memory lines, we speed-up applications by an average of 4.3 times. Moreover, the resulting system is even 23 % faster than a machine that tracks memory accesses at the fine granularity of words – a sophisticated system that is not compatible with mainstream cache coherence protocols.