This paper describes a functional test pattern generator which exploits two different paradigms: high-level decision diagrams (HLDDs) and extended finite state machines (EFSMs). HLDDs and EFSMs are deterministically explored by using propagation, justification, learning and backjumping. The integration of such strategies allows the ATPG to more efficiently analyze the state space of the design under verification and to generate very effective test sequences.
Test cases are very useful in industry. They can be generated for various purposes. In this thesis t...
The design of a finite state machine can be verified by simulating all its state transitions. Typica...
This paper describes a functional level rest pattern generator, which combines two techniques: genet...
The paper describes, first, a technique to automatically generate extended finite state machines (EF...
Extended finite state machines (EFSMs) can be efficiently adopted to model the functionality of comp...
A functional automatic test pattern generator (ATPG) that explores the design under test (DUT) state...
This paper presents a functional ATPG framework which exploits the extended finite state machine (EF...
It is a common opinion that semi-formal verification offers a good compromise between speed and exha...
The paper presents an automatic procedure for generating a particular kind of extended finite state ...
The paper presents a methodology for addressing hard-to-detect faults when a high-level ATPG is appl...
The effectiveness and the efficiency of functional ATPGs based on deterministic strategies is influe...
The paper describes a functional ATPG that explores the DUT state space by exploiting an easy-to-tra...
The Extended Finite State Machine (EFSM) is a commonly used model for specifying software systems. A...
The EFSM paradigm can be efficiently adopted to model complex designs without incurring in the state...
The paper describes a high-level pseudodeterministic ATPG that explores the DUT state space by explo...
Test cases are very useful in industry. They can be generated for various purposes. In this thesis t...
The design of a finite state machine can be verified by simulating all its state transitions. Typica...
This paper describes a functional level rest pattern generator, which combines two techniques: genet...
The paper describes, first, a technique to automatically generate extended finite state machines (EF...
Extended finite state machines (EFSMs) can be efficiently adopted to model the functionality of comp...
A functional automatic test pattern generator (ATPG) that explores the design under test (DUT) state...
This paper presents a functional ATPG framework which exploits the extended finite state machine (EF...
It is a common opinion that semi-formal verification offers a good compromise between speed and exha...
The paper presents an automatic procedure for generating a particular kind of extended finite state ...
The paper presents a methodology for addressing hard-to-detect faults when a high-level ATPG is appl...
The effectiveness and the efficiency of functional ATPGs based on deterministic strategies is influe...
The paper describes a functional ATPG that explores the DUT state space by exploiting an easy-to-tra...
The Extended Finite State Machine (EFSM) is a commonly used model for specifying software systems. A...
The EFSM paradigm can be efficiently adopted to model complex designs without incurring in the state...
The paper describes a high-level pseudodeterministic ATPG that explores the DUT state space by explo...
Test cases are very useful in industry. They can be generated for various purposes. In this thesis t...
The design of a finite state machine can be verified by simulating all its state transitions. Typica...
This paper describes a functional level rest pattern generator, which combines two techniques: genet...