An FPGA Wire Database for Run-Time Routers

Abstract. Routing flexibility improves as FPGAs increase in size and density. While advantageous for applications, the routing resource software model requires significant hard disk and memory resources. As a result, run-time routers tend to devise alternate solutions to the flat graph model used by FPGA tools in order to accomodate the limited memory available in run-time systems. JBits, a run-time reconfiguration (RTR) tool suite from Xilinx Ö, contains just this type of run-time router (JRoute). In order to accommodate the run-time memory limits placed on JRoute, JBits chose to take a different approach to storing circuit graphs. The solution, the JBits wire database, represents the wire connectivity of a device with Java objects. These objects are stored in a device generic manner that limits the references to repetitive routing structures. This and other memory reduction techniques implemented by the JBits wire database enable automatic run-time routing in RTR environments using JRoute. Beyond memory savings, the JBits wire database provides low-level control over individual wires, which is desirable in run-time routers. Also desirable in run-time routing is the ability to incrementally add and remove connections. This, along with the low-level control and the memory efficiency of the JBits wire database opens up new applications. Applications such as device testing, defect tolerance, and debugging are efficiently implemented using run-time routing with the JBits wire database. 1