Binding Time Analysis for Bits

Using a high level language (HLL) to specify a computation for synthesis in ASIC or FPGA hardware requires aggressive compiler analysis to capture bit-level program characteristics that cannot normally be expressed in a HLL but which are important to specializing and optimizing logic for size and speed. It is useful, for instance, to identify unchanging bits of a variable and subsequently remove using partial evaluation any logic which depends on them. We describe a binding-time analysis for bits which can identify static and dynamic bits of computed expressions. The analysis proves to be expensive, possibly taking logarithmically as many steps as the actual binary computation. 1 Introduction In the quest for ever-faster computation, custom computing machines can offer performance superior to traditional microprocessors. ASIC and FPGA implementations of custom logic continue to become more attractive with improvements in semiconductor manufacturing and reconfigurable architectures. Th..