The effective harnessing of multiprocessing power through strategies that control shared memory contention and achieve high system capacity is studied. Preserving the integrity of data requires the serialization of accesses to the shared variable, stored in the shared memory, that may lead to a decrease in system performance. The study is focused on a telephone switch that uses a shared-memory multiprocessor system. The scalable multiprocessor-based call control module, the capacity of which can be improved on demand through the incorporation of additional processors, can perform several functions, including call set up, billing, and switch maintenance
Moore's law states that the amount of computational power available at a given cost doubles eve...
[[abstract]]A fundamental issue that any control-based synchronization should address is how to mini...
Includes bibliographical references (page 57)Throughout the history of Computer Science, one of\ud t...
Multiple processes may contend for shared resources such as variables stored in the shared memory of...
Multiple processes may contend for shared resources such as variables stored in the shared memory of...
New telephone features and their increasingly complex interactions with one another requires better ...
Shared-memory multiprocessors built from commodity microprocessors are being increasingly used to pr...
Telecommunication switches have been implemented based mainly on centralized and distributed control...
In this paper, we propose a scalable algorithm for connection admission control (CAC). The algorithm...
AbstractParallel shared memory (PSM) switch architectures were initially introduced as means of reso...
Memory access time is a key factor limiting the performance of large-scale, shared-memory multiproce...
In this paper we present an effective load balancing algorithm for a multi-processor architecture de...
Abstract: Multiport memories are increasingly used in smart-phones, multimode handsets, multiprocess...
The issue of resolving remote memory access contention on hardware distributed shared memory multipr...
It is well known that contention is one of the factors that limit the performance of high performanc...
Moore's law states that the amount of computational power available at a given cost doubles eve...
[[abstract]]A fundamental issue that any control-based synchronization should address is how to mini...
Includes bibliographical references (page 57)Throughout the history of Computer Science, one of\ud t...
Multiple processes may contend for shared resources such as variables stored in the shared memory of...
Multiple processes may contend for shared resources such as variables stored in the shared memory of...
New telephone features and their increasingly complex interactions with one another requires better ...
Shared-memory multiprocessors built from commodity microprocessors are being increasingly used to pr...
Telecommunication switches have been implemented based mainly on centralized and distributed control...
In this paper, we propose a scalable algorithm for connection admission control (CAC). The algorithm...
AbstractParallel shared memory (PSM) switch architectures were initially introduced as means of reso...
Memory access time is a key factor limiting the performance of large-scale, shared-memory multiproce...
In this paper we present an effective load balancing algorithm for a multi-processor architecture de...
Abstract: Multiport memories are increasingly used in smart-phones, multimode handsets, multiprocess...
The issue of resolving remote memory access contention on hardware distributed shared memory multipr...
It is well known that contention is one of the factors that limit the performance of high performanc...
Moore's law states that the amount of computational power available at a given cost doubles eve...
[[abstract]]A fundamental issue that any control-based synchronization should address is how to mini...
Includes bibliographical references (page 57)Throughout the history of Computer Science, one of\ud t...