Emerging embedded applications lack of a specific standard when they require floating-point arithmetic. In this situation they use the IEEE-754 standard or ad hoc variations of it. However, this standard was not designed for this purpose. This paper aims to open a debate to define a new extension of the standard to cover embedded applications. In this work, we only focus on the impact of not performing normalization. We show how eliminating the condition of normalized numbers, implementation costs can be dramatically reduced, at the expense of a moderate loss of accuracy. Several architectures to implement addition and multiplication for non-normalized numbers are proposed and analyzed. We show that a combined architecture (adder-multiplier...
This thesis discusses modifications to IEEE 754 floating-point units to help researchers and scienti...
<p>IEEE 754 floating-point arithmetic is widely used in modern, general-purpose computers. It is bas...
This paper illustrates designing and implementation process of floating point multiplier on Field ...
Compulsory normalization of the represented numbers is a key requirement of the floating-point stand...
We present a methodology for generating floating-point arithmetic hardware designs which are, for su...
The current IEEE-754 floating point standard was adopted 23 years ago. IEEE chartered a committee to...
Abstract—In this paper we describe an open source floating-point adder and multiplier implemented us...
International audienceThis paper presents some work in progress on the design and implementation of ...
The widely implemented and used IEEE-754 Floating-point specification defines a method by which floa...
Abstract:-Financial transactions are specified in decimal arithmetic. Until the introduction of IEEE...
We disclose hardware (HW) intrinsic CPU or DSP instructions architecture and microarchitecture that ...
The high performance and capacity of current FPGAs makes them suitable as acceleration co-processors...
Floating-point numbers have an intuitive meaning when it comes to physics-based numerical computatio...
Multiplication has long been an important part of any computer architecture. It has usually been a c...
One of the main decisions when making a digital design is which arithmetic is going to be used. The...
This thesis discusses modifications to IEEE 754 floating-point units to help researchers and scienti...
<p>IEEE 754 floating-point arithmetic is widely used in modern, general-purpose computers. It is bas...
This paper illustrates designing and implementation process of floating point multiplier on Field ...
Compulsory normalization of the represented numbers is a key requirement of the floating-point stand...
We present a methodology for generating floating-point arithmetic hardware designs which are, for su...
The current IEEE-754 floating point standard was adopted 23 years ago. IEEE chartered a committee to...
Abstract—In this paper we describe an open source floating-point adder and multiplier implemented us...
International audienceThis paper presents some work in progress on the design and implementation of ...
The widely implemented and used IEEE-754 Floating-point specification defines a method by which floa...
Abstract:-Financial transactions are specified in decimal arithmetic. Until the introduction of IEEE...
We disclose hardware (HW) intrinsic CPU or DSP instructions architecture and microarchitecture that ...
The high performance and capacity of current FPGAs makes them suitable as acceleration co-processors...
Floating-point numbers have an intuitive meaning when it comes to physics-based numerical computatio...
Multiplication has long been an important part of any computer architecture. It has usually been a c...
One of the main decisions when making a digital design is which arithmetic is going to be used. The...
This thesis discusses modifications to IEEE 754 floating-point units to help researchers and scienti...
<p>IEEE 754 floating-point arithmetic is widely used in modern, general-purpose computers. It is bas...
This paper illustrates designing and implementation process of floating point multiplier on Field ...