Abstract—The vulnerability of multi-core processors is increas-ing due to tighter design margins and greater susceptibility to interference. Moreover, concurrent programming environments are the norm in the exploitation of multi-core systems. In this paper, we present an on-demand thread-level fault detection mechanism for multi-cores. The main contribution is on-demand redundancy, which allows users to set the redundancy scope in the concurrent code. To achieve this we introduce intelligent redundant thread creation and synchronization, which manages concurrency and synchronization between the redundant threads via the master. This framework was implemented in an emulation of a multi-threaded, many-core processor with single, in-order issu...
This paper presents a dynamic scheduling solution to achieve fault tolerance in many-core architectu...
Industry has shifted towards multi-core designs as we have hit the memory and power walls. However, ...
Transient faults are emerging as a critical concern in the reliability of general-purpose microproce...
The vulnerability of multi-core processors is increasing due to tighter design margins and greater s...
This paper designs and implements the Redundant Multi-Threading (RMT) in a Data-flow scheduled Multi...
© 2016 ACM. Relentless technology scaling has made transistors more vulnerable to soft, or transient...
With the spread of multi-core systems, the need to write concurrent programs in order to take advant...
Smaller transistor sizes and reduction in voltage levels in modern microprocessors induce higher sof...
Continued CMOS scaling is expected to make future micro-processors susceptible to transient faults, ...
Continuously reducing transistor sizes and aggressive low power operating modes employed by modern a...
This paper presents a novel approach to the design of multi-/many-core systems with an adaptive leve...
Multithreaded concurrent programs often exhibit bugs due to unintended interferences among the concu...
We propose a scheme for transient-fault recovery called Simultaneously and Redundantly Threaded proc...
International audienceDevelopment trends for computing platforms moved from increasing the frequency...
With the development of multi-core processors, concurrent programs are becoming more and more popula...
This paper presents a dynamic scheduling solution to achieve fault tolerance in many-core architectu...
Industry has shifted towards multi-core designs as we have hit the memory and power walls. However, ...
Transient faults are emerging as a critical concern in the reliability of general-purpose microproce...
The vulnerability of multi-core processors is increasing due to tighter design margins and greater s...
This paper designs and implements the Redundant Multi-Threading (RMT) in a Data-flow scheduled Multi...
© 2016 ACM. Relentless technology scaling has made transistors more vulnerable to soft, or transient...
With the spread of multi-core systems, the need to write concurrent programs in order to take advant...
Smaller transistor sizes and reduction in voltage levels in modern microprocessors induce higher sof...
Continued CMOS scaling is expected to make future micro-processors susceptible to transient faults, ...
Continuously reducing transistor sizes and aggressive low power operating modes employed by modern a...
This paper presents a novel approach to the design of multi-/many-core systems with an adaptive leve...
Multithreaded concurrent programs often exhibit bugs due to unintended interferences among the concu...
We propose a scheme for transient-fault recovery called Simultaneously and Redundantly Threaded proc...
International audienceDevelopment trends for computing platforms moved from increasing the frequency...
With the development of multi-core processors, concurrent programs are becoming more and more popula...
This paper presents a dynamic scheduling solution to achieve fault tolerance in many-core architectu...
Industry has shifted towards multi-core designs as we have hit the memory and power walls. However, ...
Transient faults are emerging as a critical concern in the reliability of general-purpose microproce...