Traditional memory fences are program-based. That is, a mem-ory fence enforces a serialization point in the program instruction stream — it ensures that all memory references before the fence in the program order have taken effect before the execution contin-ues onto instructions after the fence. Such program-based memory fences always cause the processor to stall, even when the synchro-nization is unnecessary during a particular execution. We propose the concept of location-based memory fences, in which a proces-sor executing a concurrent algorithm incurs synchronization cost due to latency of memory fences only when the synchronization is needed. Unlike a program-based memory fence, a location-based mem-ory fence serializes the instructio...
Modern architectures provide weaker memory consistency guarantees than sequential consistency. These...
none3siThis brief proposes a novel technique to alleviate the cost of timing error recovery, buildin...
Abstract. We describe a simple, but powerful, program logic for rea-soning about C11 relaxed accesse...
Many modern multicore architectures support shared mem-ory for ease of programming and relaxed memor...
Memory fences inhibit the reordering of memory accesses in modern microprocessors; fences are useful...
Abstract—This paper addresses the problem of placing mem-ory fences in a concurrent program running ...
In multiprocessor systems with weakly consistent shared memory, memory fence (also know as barrier) ...
Abstract—We observe that fence instructions used by pro-grammers are usually only intended to order ...
In multiprocessor systems with weakly consistent shared memory, memory fence (also know as barrier) ...
For efficiency reasons, most modern processor architectures allow the reordering of CPU instructions...
Fences are instructions that programmers or compilers insert in the code to prevent the compiler or ...
Shared memory has been widely adopted as the primary system level programming abstraction on modern ...
Shared-memory programmers traditionally assumed Sequential Consistency (SC), but modern systems have...
Weak memory models implemented on modern multicore processors are known to affect the correctness of...
Modern architectures provide weaker memory consistency guarantees than sequential consistency. These...
Modern architectures provide weaker memory consistency guarantees than sequential consistency. These...
none3siThis brief proposes a novel technique to alleviate the cost of timing error recovery, buildin...
Abstract. We describe a simple, but powerful, program logic for rea-soning about C11 relaxed accesse...
Many modern multicore architectures support shared mem-ory for ease of programming and relaxed memor...
Memory fences inhibit the reordering of memory accesses in modern microprocessors; fences are useful...
Abstract—This paper addresses the problem of placing mem-ory fences in a concurrent program running ...
In multiprocessor systems with weakly consistent shared memory, memory fence (also know as barrier) ...
Abstract—We observe that fence instructions used by pro-grammers are usually only intended to order ...
In multiprocessor systems with weakly consistent shared memory, memory fence (also know as barrier) ...
For efficiency reasons, most modern processor architectures allow the reordering of CPU instructions...
Fences are instructions that programmers or compilers insert in the code to prevent the compiler or ...
Shared memory has been widely adopted as the primary system level programming abstraction on modern ...
Shared-memory programmers traditionally assumed Sequential Consistency (SC), but modern systems have...
Weak memory models implemented on modern multicore processors are known to affect the correctness of...
Modern architectures provide weaker memory consistency guarantees than sequential consistency. These...
Modern architectures provide weaker memory consistency guarantees than sequential consistency. These...
none3siThis brief proposes a novel technique to alleviate the cost of timing error recovery, buildin...
Abstract. We describe a simple, but powerful, program logic for rea-soning about C11 relaxed accesse...