M-of-N Code Decomposition for Indicating Combinational Logic

Self-timed circuits present an attractive solution to the problem of process variation. However, implementing self-timed combinational logic is complex and expensive. In particular, mapping large function blocks into cell-libraries is difficult as decomposing gates introduces new signals which may violate indication. This paper presents a novel method for implementing any m-of-n encoded function block using “bounded gates”, where any gate may be decomposed without violating indication. This is achieved by successively decomposing the input encoding into smaller m-of-n codes. The method described in the paper uses algebraic extraction techniques to efficiently deter-mine and quantify potential re-encodings. The results of the synthesis procedure are demonstrated on a range of combi-national function blocks. 1