Abstract—Interrupt behaviors, particularly the external ones, are difficult to verify in a microprocessor. Because the external interrupt arrival time and the microprocessor response time must be precise, verification requires sophisticated hardware and soft-ware design. This paper proposes a computer-aided design tool, called processor exception verification tool (PEVT), to verify the external interrupt behaviors of microprocessors, including indi-vidual, multiple, and nested interrupts. An architecture descrip-tion language extension, called Exception Description Language (EXPDL), is developed for the designer to capture the external interrupt behaviors for the microprocessor under verification. PEVT is responsible for generating the veri...
The paper presents a sequence of three projects on design and formal verification of pipelined and s...
A project is under way at the University of Michigan to develop a design verification methodology fo...
In this work we present a verification framework for applications for the embedded system operating ...
Interrupt behaviors, especially the external ones, are diffi-cult to verify in a microprocessor desi...
Abstract-The microprocessor verification challenge becomes higher in the on-chip bus (OCB) than in t...
Information security is important in academia, industry and government. The use of formal methods in...
In this paper, we describe a fast and convenient verification method-ology for microprocessor using ...
The study on verification trends in the semiconductor industry shows that the design complexity is i...
The interrupt mechanism in a system-on-chip (SoC) joins the SoCs hardware and software behaviors. We...
Building a high-performance microprocessor presents many reliability challenges. De-signers must ver...
Interrupt-driven software is difficult to test and debug, especially when interrupts can be nested a...
A design verification methodology for microprocessor hardware based on modeling design errors and ge...
This paper presents a detailed description of the application of a formal verification methodology ...
In complex System-on-a-Chip (SoC) designs, designers often need to add new features into an original...
The role of automatic formal protocol verifica- tion in hardware design is considered. Principles ar...
The paper presents a sequence of three projects on design and formal verification of pipelined and s...
A project is under way at the University of Michigan to develop a design verification methodology fo...
In this work we present a verification framework for applications for the embedded system operating ...
Interrupt behaviors, especially the external ones, are diffi-cult to verify in a microprocessor desi...
Abstract-The microprocessor verification challenge becomes higher in the on-chip bus (OCB) than in t...
Information security is important in academia, industry and government. The use of formal methods in...
In this paper, we describe a fast and convenient verification method-ology for microprocessor using ...
The study on verification trends in the semiconductor industry shows that the design complexity is i...
The interrupt mechanism in a system-on-chip (SoC) joins the SoCs hardware and software behaviors. We...
Building a high-performance microprocessor presents many reliability challenges. De-signers must ver...
Interrupt-driven software is difficult to test and debug, especially when interrupts can be nested a...
A design verification methodology for microprocessor hardware based on modeling design errors and ge...
This paper presents a detailed description of the application of a formal verification methodology ...
In complex System-on-a-Chip (SoC) designs, designers often need to add new features into an original...
The role of automatic formal protocol verifica- tion in hardware design is considered. Principles ar...
The paper presents a sequence of three projects on design and formal verification of pipelined and s...
A project is under way at the University of Michigan to develop a design verification methodology fo...
In this work we present a verification framework for applications for the embedded system operating ...