In this paper, we describe a fast and convenient verification method-ology for microprocessor using large-size, real application pro-grams as test vectors. The verification environment is based on automatic consistency checking between the golden behavioral ref-erence model and the target HDL model, which are run in an hand-shaking fashion. In conjunction with the automatic comparison facility, a new HDL saver is proposed to accelerate the verifica-tion process. The proposed saver allows 'restart ' from the nearest checkpoint before the point of inconsistency detection regardless of whether any modification on the source code is made or not. It is to be contrasted with conventional saver that does not allow restart when some desig...
The study on verification trends in the semiconductor industry shows that the design complexity is i...
Abstract. We describe the techniques we have used to search for bugs in the memory subsystem of a ne...
model description I features Polaris macro instruction behavior I register MCV micro-operation I reg...
Abstract—Interrupt behaviors, particularly the external ones, are difficult to verify in a microproc...
Interrupt behaviors, especially the external ones, are diffi-cult to verify in a microprocessor desi...
The use of assertions for monitoring the designer’s intention in hardware description language (HDL)...
Verification of chip multiprocessor memory systems re-mains challenging. While formal methods have b...
Abstract- As the complexity of high-performance microprocessor increases, functional verification be...
Over the past four decades microprocessors have come to be a vital and inseparable part of the moder...
Building a high-performance microprocessor presents many reliability challenges. De-signers must ver...
International audienceThe massive diffusion of custom system-on-a-chipand the growing obsolescence p...
With increasing design complexity, verification becomes a more and more important aspect of the desi...
We report on our experience with a new test generation language for processor verification. The veri...
We describe an efficient validity checker for the quantifier-free logic of equality with uninterpret...
Abstract—Software-based simulation provides a convenient environ-ment for microprocessor design vali...
The study on verification trends in the semiconductor industry shows that the design complexity is i...
Abstract. We describe the techniques we have used to search for bugs in the memory subsystem of a ne...
model description I features Polaris macro instruction behavior I register MCV micro-operation I reg...
Abstract—Interrupt behaviors, particularly the external ones, are difficult to verify in a microproc...
Interrupt behaviors, especially the external ones, are diffi-cult to verify in a microprocessor desi...
The use of assertions for monitoring the designer’s intention in hardware description language (HDL)...
Verification of chip multiprocessor memory systems re-mains challenging. While formal methods have b...
Abstract- As the complexity of high-performance microprocessor increases, functional verification be...
Over the past four decades microprocessors have come to be a vital and inseparable part of the moder...
Building a high-performance microprocessor presents many reliability challenges. De-signers must ver...
International audienceThe massive diffusion of custom system-on-a-chipand the growing obsolescence p...
With increasing design complexity, verification becomes a more and more important aspect of the desi...
We report on our experience with a new test generation language for processor verification. The veri...
We describe an efficient validity checker for the quantifier-free logic of equality with uninterpret...
Abstract—Software-based simulation provides a convenient environ-ment for microprocessor design vali...
The study on verification trends in the semiconductor industry shows that the design complexity is i...
Abstract. We describe the techniques we have used to search for bugs in the memory subsystem of a ne...
model description I features Polaris macro instruction behavior I register MCV micro-operation I reg...