This article presents a secure mutual testing strategy for System-on-Chips (SoCs) that implement cryptographic functionalities. Such approach eliminates the need for an additional trusted component that is used to test security sensitive cores in a SoC, like symmetric and public-key cryptographic modules. We combine two test approaches: Logic Built In Self Test (BIST) and secure scan-chain based testing and develop a strategy that preserves the test quality of the standard test methods, enhancing security of the testing scheme. In order to minimize the area overhead of the presented solution, we re-use the existing modules in different manners: a public-key cryptographic core to build the BIST infrastructure and a symmetric one to authentic...
International audienceThe testability of electronic devices is of critical importance and it is ofte...
National audienceCrypto-processors are the target of attacks. For instance, an attacker may exploit ...
This research provides a set of methods, tools and design guidelines that help a designer to constr...
Globalization of the semiconductor industry increases the vulnerability of integrated circuits. This...
International audienceThis paper describes a generic BIST strategy for devices implementing symmetri...
National audienceTest infrastructures are widely deployed in modern Systems-on-Chip (SoC). They allo...
Relying on a recently developed gate-level information assurance scheme, we formally analyze the sec...
Testing of Integrated Circuit (IC) is important phase in production cycle. Today’s System-on-chip (S...
Globalization of the semiconductor industry has raised concerns about the trustworthiness of integra...
International audienceThe design of secure ICs requires fulfilling means conforming to many design r...
Scan techniques are almost mandatorily adopted in designing current System-on-a-Chip (SoC) to enhanc...
International audienceCryptographic algorithms are used to protect sensitive information from untrus...
Abstract — Hardware implementation of cryptographic algorithms is subject to various attacks. It has...
International audienceTesting a secure system is often considered as a severe bottleneck. While test...
Interconnect centric security in multi core System-on-Chip (SoC) is an area of increasing concern. M...
International audienceThe testability of electronic devices is of critical importance and it is ofte...
National audienceCrypto-processors are the target of attacks. For instance, an attacker may exploit ...
This research provides a set of methods, tools and design guidelines that help a designer to constr...
Globalization of the semiconductor industry increases the vulnerability of integrated circuits. This...
International audienceThis paper describes a generic BIST strategy for devices implementing symmetri...
National audienceTest infrastructures are widely deployed in modern Systems-on-Chip (SoC). They allo...
Relying on a recently developed gate-level information assurance scheme, we formally analyze the sec...
Testing of Integrated Circuit (IC) is important phase in production cycle. Today’s System-on-chip (S...
Globalization of the semiconductor industry has raised concerns about the trustworthiness of integra...
International audienceThe design of secure ICs requires fulfilling means conforming to many design r...
Scan techniques are almost mandatorily adopted in designing current System-on-a-Chip (SoC) to enhanc...
International audienceCryptographic algorithms are used to protect sensitive information from untrus...
Abstract — Hardware implementation of cryptographic algorithms is subject to various attacks. It has...
International audienceTesting a secure system is often considered as a severe bottleneck. While test...
Interconnect centric security in multi core System-on-Chip (SoC) is an area of increasing concern. M...
International audienceThe testability of electronic devices is of critical importance and it is ofte...
National audienceCrypto-processors are the target of attacks. For instance, an attacker may exploit ...
This research provides a set of methods, tools and design guidelines that help a designer to constr...