POSTER: PUF-based Secure Test Wrapper for Cryptographic SoC

Globalization of the semiconductor industry has raised concerns about the trustworthiness of integrated circuits. This particularly becomes a major concern for cryptographic IP blocks integrated on a System-on-Chip (SoC). The trustworthiness of these cryptographic blocks can be ensured with an appropriate test strategy. Presently, the IEEE 1500 Test Wrapper has emerged as the test standard for industrial SoCs. Additionally a secure activation mechanism has been proposed to this standard in order to restrict access to the testing interface to eligible testers by using a cryptographic authentication mechanism. This access mechanism is necessary in order to avoid any side-channels which may leak secret information to adversaries. However, this approach requires the authentication mechanism to be implemented in the underlying hardware incurring an area overhead, and the authentication secrets to be securely stored in non-volatile memory (NVM), which may be susceptible to side-channel attacks. In this work, we enhance the secure test wrapper allowing testing of multiple IP blocks using a PUF-based authentication mechanism which overcomes the need for secure NVM and reduces the implementation overhead