USING MATLAB AND SIMULINK IN A SYSTEMC VERIFICATION ENVIRONMENT

Abstract- Functional verification is a major bottleneck in today’s design flow. Expensive and time consuming, the process of verifying complex designs is actually under serious reconsideration. We propose a new verification framework based on SystemC verification standard that uses MATLAB and Simulink to accelerate testbench development. Our major contributions are first a cosimulation interface between SystemC and MATLAB and Simulink, and next to enable functional verification of multi-abstraction levels designs. This paper presents the verification framework proposed and the cosimulation interface. An example shows how we used this verification framework in one of our project