ACKNOWLEDGMENTS

A loop buffer is a memory located between CPU and level one instruction cache, called IL1 hereafter. The difference between the loop buffer and the cache dedicate for instructions is that the loop buffer only keeps the instructions in sequence. Therefore it contains the advantages of smaller size and high speed over the main cache. The instruction fetch unit can obtain the maximum benefit from loop buffer while the size of loop buffer is large enough to contain whole instructions in a loop, the instructions just need to be fetched from the cache only one time and then it can deliver instructions to CPU core at very low energy level. In the previous researches, the controller begins to detect the innermost loop at the fetch stage. The branches whether are predicted taken or not taken mainly depend on the branch predictor. Once the backward branches or the forward branches in the loop are miss-predicted, the controlled have to flush the instructions in the buffer, detect and refill a new loop from the main cache. Especially, the forward branches are so instable that the predictor cannot bring its value into play. Instead, this appearanc