Many portable and embedded applications are characterized by spending a large fraction of their execution time on small program loops. In these applications, in-struction fetch energy can be reduced by using a small instruction cache when exe-cuting these tight loops. Recent work has shown that it is possible to use a small instruction cache without incurring any performance penality [4, 6]. In this paper, we will extend the work done in [6]. In the modified loop caching scheme proposed in this paper, when a program loop is larger than the loop cache size, the loop cache is capable of capturing only part of the program loop without having any cache con-flict problem. For a given loop cache size, our loop caching scheme can reduce in-structi...
Code compression could lead to less overall system die area and therefore less cost. This is signifi...
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip ...
Managing the energy-performance tradeoff has become a major challenge on embedded systems. The cache...
Dynamically-loaded tagless loop caching reduces instruction fetch power for embedded software with s...
For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the ins...
In this paper we propose a technique that uses an ad-ditional mini cache located between the I-Cache...
Abstract—Recently, several loop buffer designs have been proposed to reduce instruction fetch energy...
\u3cp\u3eEnergy consumption in embedded systems is strongly dominated by instruction memory organiza...
For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the ins...
Fetching instructions from a set-associative cache in an embedded processor can consume a large amou...
Embedded systems are ubiquitous. They are often driven by batteries; therefore, low power consumptio...
... embedded devices to have the benefits of a memory hierarchy without the hardware costs. A softwa...
Abstract — In many computer systems, a large portion of the execution time and energy consumption is...
International audienceUsual cache optimisation techniques for high performance computing are difficu...
Recently there has been a lot of effort in making the Internet of Things (IoT) a reality. A central ...
Code compression could lead to less overall system die area and therefore less cost. This is signifi...
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip ...
Managing the energy-performance tradeoff has become a major challenge on embedded systems. The cache...
Dynamically-loaded tagless loop caching reduces instruction fetch power for embedded software with s...
For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the ins...
In this paper we propose a technique that uses an ad-ditional mini cache located between the I-Cache...
Abstract—Recently, several loop buffer designs have been proposed to reduce instruction fetch energy...
\u3cp\u3eEnergy consumption in embedded systems is strongly dominated by instruction memory organiza...
For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the ins...
Fetching instructions from a set-associative cache in an embedded processor can consume a large amou...
Embedded systems are ubiquitous. They are often driven by batteries; therefore, low power consumptio...
... embedded devices to have the benefits of a memory hierarchy without the hardware costs. A softwa...
Abstract — In many computer systems, a large portion of the execution time and energy consumption is...
International audienceUsual cache optimisation techniques for high performance computing are difficu...
Recently there has been a lot of effort in making the Internet of Things (IoT) a reality. A central ...
Code compression could lead to less overall system die area and therefore less cost. This is signifi...
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip ...
Managing the energy-performance tradeoff has become a major challenge on embedded systems. The cache...